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ORCIDIlia Polian
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- affiliation: Stuttgart University, Germany
- affiliation (former): University of Passau, Germany
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Journal Articles
- 2026
[j44]Xianyue Zhao
, Alon Ascoli, Ahmet Samil Demirkol, Ioannis Messaris, Jan Dellith, Ilia Polian, Heidemarie Krüger, Ronald Tetzlaff, Nan Du:
Chaotic Circuit Design Leveraging the Analog Nonlinear Dynamics of a Self-Rectifying Memristor. IEEE Open J. Circuits Syst. 7: 269-281 (2026)- 2025
- [j43]Roshwin Sengupta, Ilia Polian, John P. Hayes:
Comparative Analysis of Error Tolerance and Hardware Efficiency in Stochastic Computing-based Digital Filters. J. Circuits Syst. Comput. 34(18) (2025) - [j42]Roshwin Sengupta, Ilia Polian, John P. Hayes:
WASENN: Wavelet Assisted Stochastic Enabled Neural Network for Human Activity Recognition. IEEE Trans. Circuits Syst. I Regul. Pap. 72(10): 5761-5773 (2025) - 2024
- [j41]Devanshi Upadhyaya, Maël Gay, Ilia Polian:
Locking-Enabled Security Analysis of Cryptographic Circuits. Cryptogr. 8(1): 2 (2024) - [j40]Yanjun Ji, Ilia Polian:
Synergistic Dynamical Decoupling and Circuit Design for Enhanced Algorithm Performance on Near-Term Quantum Devices. Entropy 26(7): 586 (2024) - [j39]Xianyue Zhao, Li-Wei Chen, Kefeng Li, Heidemarie Schmidt, Ilia Polian, Nan Du:
Memristive True Random Number Generator for Security Applications. Sensors 24(15): 5001 (2024) - 2023
- [j38]Sebastian Brandhofer, Daniel Braun, Vanessa Dehn, Gerhard Hellstern, Matthias Hüls, Yanjun Ji, Ilia Polian, Amandeep Singh Bhatia, Thomas Wellens:
Benchmarking the performance of portfolio optimization with QAOA. Quantum Inf. Process. 22(1): 25 (2023) - [j37]Li-Wei Chen, Ziang Chen, Werner Schindler, Xianyue Zhao, Heidemarie Schmidt, Nan Du, Ilia Polian:
On Side-Channel Analysis of Memristive Cryptographic Circuits. IEEE Trans. Inf. Forensics Secur. 18: 463-476 (2023) - 2021
- [j36]Francesco Regazzoni, Paolo Palmieri, Fethulah Smailbegovic, Rosario Cammarota, Ilia Polian:
Protecting artificial intelligence IPs: a survey of watermarking and fingerprinting for machine learning. CAAI Trans. Intell. Technol. 6(2): 180-191 (2021) - [j35]Ilia Polian, John P. Hayes, Vincent T. Lee, Weikang Qian:
Guest Editors' Introduction: Stochastic Computing for Neuromorphic Applications. IEEE Des. Test 38(6): 5-15 (2021) - [j34]Osnat Keren, Ilia Polian:
IPM-RED: combining higher-order masking with robust error detection. J. Cryptogr. Eng. 11(2): 147-160 (2021) - [j33]Domenic Forte, Debdeep Mukhopadhyay, Ilia Polian, Yunsi Fei, Rosario Cammarota:
Introduction to the Special Issue on Emerging Challenges and Solutions in Hardware Security. ACM J. Emerg. Technol. Comput. Syst. 17(3): 29:1-29:4 (2021) - 2020
- [j32]Mael Gay, Batya Karp, Osnat Keren, Ilia Polian:
Error control scheme for malicious and natural faults in cryptographic modules. J. Cryptogr. Eng. 10(4): 321-336 (2020) - 2019
- [j31]Mael Gay, Batya Karp, Osnat Keren, Ilia Polian:
Toward Error-Correcting Architectures for Cryptographic Circuits Based on Rabii-Keren Codes. IEEE Embed. Syst. Lett. 11(4): 115-118 (2019) - [j30]Ilia Polian:
Hardware-oriented security. it Inf. Technol. 61(1): 1-2 (2019) - [j29]Josef Kinseher, Moritz Völker, Ilia Polian:
Improving Testability and Reliability of Advanced SRAM Architectures. IEEE Trans. Emerg. Top. Comput. 7(3): 456-467 (2019) - 2018
- [j28]Ilia Polian:
Test and Reliability Challenges for Approximate Circuitry. IEEE Embed. Syst. Lett. 10(1): 26-29 (2018) - [j27]Florian Neugebauer, Ilia Polian, John P. Hayes:
Framework for Quantifying and Managing Accuracy in Stochastic Circuit Design. ACM J. Emerg. Technol. Comput. Syst. 14(2): 31:1-31:21 (2018) - [j26]Florian Neugebauer, Ilia Polian, John P. Hayes:
S-box-based random number generation for stochastic computing. Microprocess. Microsystems 61: 316-326 (2018) - 2016
- [j25]Matthias Sauer, Bernd Becker, Ilia Polian:
PHAETON: A SAT-Based Framework for Timing-Aware Path Sensitization. IEEE Trans. Computers 65(6): 1869-1881 (2016) - 2015
- [j24]Linus Feiten, Matthias Sauer, Tobias Schubert, Victor Tomashevich, Ilia Polian, Bernd Becker:
Formal Vulnerability Analysis of Security Components. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(8): 1358-1369 (2015) - 2014
- [j23]Ilia Polian, Mohammad Tehranipoor:
Guest Editorial. IET Comput. Digit. Tech. 8(6): 237-238 (2014) - [j22]Ilia Polian:
Hardware security and test: Friends or enemies? it Inf. Technol. 56(4): 192-202 (2014) - 2013
- [j21]Matthias Sauer, Alexander Czutro, Tobias Schubert, Stefan Hillebrecht, Ilia Polian, Bernd Becker:
SAT-Based Analysis of Sensitizable Paths. IEEE Des. Test 30(4): 81-88 (2013) - 2011
- [j20]Fabian Hopsch, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich:
Variation-aware fault modeling. Sci. China Inf. Sci. 54(9): 1813-1826 (2011) - [j19]Ilia Polian, John P. Hayes:
Selective Hardening: Toward Cost-Effective Error Tolerance. IEEE Des. Test Comput. 28(3): 54-63 (2011) - [j18]Ilia Polian, John P. Hayes, Sudhakar M. Reddy, Bernd Becker:
Modeling and Mitigating Transient Errors in Logic Circuits. IEEE Trans. Dependable Secur. Comput. 8(4): 537-547 (2011) - 2010
- [j17]Alejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker:
Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability Analysis. Int. J. Parallel Program. 38(3-4): 185-202 (2010) - [j16]Ilia Polian, Bernd Becker:
Fault Models and Test Algorithms for Nanoscale Technologies (Fehlermodelle und Testalgorithmen für Nanoscale-Technologien). it Inf. Technol. 52(4): 189-194 (2010) - [j15]Ilia Polian:
Power Supply Noise: Causes, Effects, and Testing. J. Low Power Electron. 6(2): 326-338 (2010) - 2009
- [j14]Piet Engelke, Bernd Becker, Michel Renovell, Jürgen Schlöffel, Bettina Braitling, Ilia Polian:
SUPERB: Simulator utilizing parallel evaluation of resistive bridges. ACM Trans. Design Autom. Electr. Syst. 14(4): 56:1-56:21 (2009) - 2008
- [j13]Piet Engelke, Ilia Polian, Michel Renovell, Sandip Kundu, Bharath Seshadri, Bernd Becker:
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2): 327-338 (2008) - 2007
- [j12]Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd Becker:
Power Droop Testing. IEEE Des. Test Comput. 24(3): 276-284 (2007) - [j11]Ilia Polian, Hideo Fujiwara:
Functional Constraints vs. Test Compression in Scan-Based Delay Testing. J. Electron. Test. 23(5): 445-455 (2007) - 2006
- [j10]Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker:
Automatic Test Pattern Generation for Resistive Bridging Faults. J. Electron. Test. 22(1): 61-69 (2006) - [j9]Bernd Becker, Ilia Polian, Sybille Hellebrand, Bernd Straube, Hans-Joachim Wunderlich:
DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme (DFG-Project - Test and Reliability of Nano-Electronic Systems). it Inf. Technol. 48(5): 304- (2006) - [j8]Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker:
Simulating Resistive-Bridging and Stuck-At Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 2181-2192 (2006) - [j7]Yuyi Tang, Hans-Joachim Wunderlich, Piet Engelke, Ilia Polian, Bernd Becker, Jürgen Schlöffel, Friedrich Hapke, Michael Wittke:
X-masking during logic BIST and its impact on defect coverage. IEEE Trans. Very Large Scale Integr. Syst. 14(2): 193-202 (2006) - 2005
- [j6]Ilia Polian, Piet Engelke, Michel Renovell, Bernd Becker:
Modeling Feedback Bridging Faults with Non-Zero Resistance. J. Electron. Test. 21(1): 57-69 (2005) - [j5]Ilia Polian:
Nichtstandardfehlermodelle für digitale Logikschaltkreise: Simulation, prüfgerechter Entwurf, industrielle Anwendungen (On Non-standard Fault Models for Logic Digital Circuits: Simulation, Design for Testability, Industrial Applications). it Inf. Technol. 47(3): 172-174 (2005) - 2004
- [j4]Ilia Polian, Bernd Becker:
Scalable Delay Fault BIST for Use with Low-Cost ATE. J. Electron. Test. 20(2): 181-197 (2004) - 2003
- [j3]Ilia Polian, Bernd Becker:
Multiple Scan Chain Design for Two-Pattern Testing. J. Electron. Test. 19(1): 37-48 (2003) - [j2]Jonathan Bradford, Hartmut Delong, Ilia Polian, Bernd Becker:
Simulating Realistic Bridging and Crosstalk Faults in an Industrial Setting. J. Electron. Test. 19(4): 387-395 (2003) - [j1]Ilia Polian, Wolfgang Günther, Bernd Becker:
Pattern-based verification of connections to intellectual property cores. Integr. 35(1): 25-44 (2003)
Conference and Workshop Papers
- 2026
- [c190]Felix Bayhurst, Li-Wei Chen, Kefeng Li, Heidemarie Krüger, Nan Du, Ilia Polian:
Synthesizing Mixed-Mode Operations for Memristors using Majority Decomposition. DATE 2026: 1-3 - [c189]Simon Wilhelmstätter, Johannes Stark, Devanshi Upadhyaya, Maël Gay, Ilia Polian, Maurits Ortmanns:
Late Breaking Results: Practical Power Side-Channel Attack on Analog Compute-in-Memory Macro. DATE 2026: 1-3 - 2025
- [c188]Alexander Kharitonov, Tarick Welling, Maël Gay, Ilia Polian:
Hamming Weight-Based Side Channel Analysis of HLS Kyber Hardware Using Neural Networks. ACNS Workshops (1) 2025: 58-76 - [c187]Denis Schwachhofer, Steffen Becker, Stefan Wagner, Matthias Sauer, Ilia Polian:
Exploring the Limits of LLMs for System-Level Test Program Generation: Can LLaMas Outrun Darwin? ATS 2025: 31-36 - [c186]Roshwin Sengupta, John P. Hayes, Ilia Polian:
Fault-Tolerant and Low-Latency Stochastic Neural Networks via Adaptive Bitstream Precision. ATS 2025: 169-174 - [c185]Ilia Polian, Xianyue Zhao, Li-Wei Chen, Felix Bayhurst, Ziang Chen, Heidemarie Schmidt, Nan Du:
Optimal Synthesis of Memristive Mixed-Mode Circuits. DATE 2025: 1-7 - [c184]Nourhan Elhamawy, Jens Anders, Ilia Polian, Matthias Sauer:
Towards Understanding of System-Level Test Unique Fails. ETS 2025: 1-4 - [c183]Anand Venkatachalam, Ernst Aderholz, Matthias Sauer, Simon Schweizer, Matthias Werner, Ilia Polian:
Automated Test Equipment Drift Characterization Based on Gauge Repeatability and Reproducibility. ETS 2025: 1-6 - [c182]Tarick Welling, Maël Gay, Ilia Polian:
Multi Coefficient CPA on a Black Box Hardware Implementation of CRYSTALS-Kyber. ETS 2025: 1-6 - [c181]Kenzaburo Ishizu, Toshimitsu Honda, Kohei Miyase, Stefan Holst, Shudai Ishikawa, Roshwin Sengupta, Ilia Polian:
Motion Classification by Utilizing Machine Learning for Acceleration Data. ICCE 2025: 1-6 - [c180]Roshwin Sengupta, Ilia Polian, John P. Hayes:
Low-Power Continuous Wavelet Transform Employing Stochastic Computing. ISCAS 2025: 1-5 - [c179]Anand Venkatachalam, Ernst Aderholz, Matthias Sauer, Simon Schweizer, Matthias Werner, Ilia Polian:
Influence of Automated Test Equipment Drift on Process Capability Studies. ITC 2025: 422-425 - [c178]Simon Wilhelmstätter, Joschua Conrad, Johannes Stark, Devanshi Upadhyaya, Maël Gay, Ilia Polian, Maurits Ortmanns:
1/2CcellV2DD? An Energy Model for Compute-in-Memory SRAM Cells. SMACD 2025: 1-4 - [c177]Kangwei Xu, Denis Schwachhofer, Jason Blocklove, Ilia Polian, Peter Domanski, Dirk Pflüger, Siddharth Garg, Ramesh Karri, Ozgur Sinanoglu, Johann Knechtel, Zhuorui Zhao, Ulf Schlichtmann, Bing Li:
Large Language Models (LLMs) for Electronic Design Automation (EDA) : Special Session Paper. SOCC 2025: 1-6 - 2024
- [c176]Simon Wilhelmstätter, Joschua Conrad, Devanshi Upadhyaya, Ilia Polian, Maurits Ortmanns:
Attacking a Joint Protection Scheme for Deep Neural Network Hardware Accelerators and Models. AICAS 2024: 144-148 - [c175]Karthik Pandaram, Hussam Amrouch, Ilia Polian:
Optimized Detection of Marginal Defects in Standard Cells Using Unsupervised Learning. ATS 2024: 1-6 - [c174]Roshwin Sengupta, Ilia Polian, John P. Hayes:
Fault Tolerance in Stochastic Circuits for Recurrent Sequential Neural Networks. ATS 2024: 1-6 - [c173]Simon Wilhelmstätter, Joschua Conrad, Devanshi Upadhyaya, Ilia Polian, Maurits Ortmanns:
Enabling Power Side-Channel Attack Simulation on Mixed-Signal Neural Network Accelerators. COINS 2024: 1-5 - [c172]Roshwin Sengupta, Ilia Polian, John P. Hayes:
Performance and Error Tolerance of Stochastic Computing-Based Digital Filter Design. DDECS 2024: 7-12 - [c171]Denis Schwachhofer, Peter Domanski, Steffen Becker, Stefan Wagner, Matthias Sauer, Dirk Pflüger, Ilia Polian:
Large Language Model-Based Optimization for System-Level Test Program Generation. DFT 2024: 1-6 - [c170]Devanshi Upadhyaya, Ilia Polian:
Optimizing Waveform Accurate Fault Attacks Using Formal Methods. DFT 2024: 1-6 - [c169]Denis Schwachhofer, Francesco Angione, Steffen Becker, Stefan Wagner, Matthias Sauer, Paolo Bernardi, Ilia Polian:
Optimizing System-Level Test Program Generation via Genetic Programming. ETS 2024: 1-4 - [c168]Denis Schwachhofer, Peter Domanski, Steffen Becker, Stefan Wagner, Matthias Sauer, Dirk Pflüger, Ilia Polian:
Training Large Language Models for System-Level Test Program Generation Targeting Non-functional Properties. ETS 2024: 1-4 - [c167]Anton Maidl, Maël Gay, Osnat Keren, Ilia Polian:
Refinement and Empirical Side-Channel Analysis of Inner Product Masking with Robust Error Detection. IOLTS 2024: 1-7 - [c166]Nourhan Elhamawy, Jens Anders, Ilia Polian, Matthias Sauer:
Scenario-based Test Content Optimization: Scan Test vs. System-Level Test. VTS 2024: 1-7 - 2023
- [c165]Li-Wei Chen, Xianyue Zhao, Ziang Chen, Nan Du, Ilia Polian:
Side-channel Attacks on Memristive Circuits Under External Disturbances. ATS 2023: 1-6 - [c164]Dina Hesse, Maël Gay, Ilia Polian, Elif Bilge Kavun, Owen Millwood, Witali Bartsch:
A Modular Open-Source Cryptographic Co-Processor for Internet of Things. DSD 2023: 251-259 - [c163]Florian Neugebauer, Vivek Vekariya, Ilia Polian, John P. Hayes:
Stochastic Computing as a Defence Against Adversarial Attacks. DSN-W 2023: 191-194 - [c162]Jens Anders, Pablo Andreu, Bernd Becker, Steffen Becker, Riccardo Cantoro, Nikolaos Ioannis Deligiannis, Nourhan Elhamawy, Tobias Faller, Carles Hernández, Nele Mentens, Mahnaz Namazi Rizi, Ilia Polian, Abolfazl Sajadi, Matthias Sauer, Denis Schwachhofer, Matteo Sonza Reorda, Todor Stefanov, Ilya Tuzov, Stefan Wagner, Nusa Zidaric:
A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors. ETS 2023: 1-10 - [c161]Lorenzo Masciullo, Roberto Passerone, Francesco Regazzoni, Ilia Polian:
Secrets Leaking Through Quicksand: Covert Channels in Approximate Computing. ETS 2023: 1-6 - [c160]Denis Schwachhofer, Maik Betka, Steffen Becker, Stefan Wagner, Matthias Sauer, Ilia Polian:
Automating Greybox System-Level Test Generation. ETS 2023: 1-4 - [c159]Devanshi Upadhyaya, Maël Gay, Ilia Polian:
LEDA: Locking Enabled Differential Analysis of Cryptographic Circuits. HOST 2023: 249-259 - [c158]Sebastian Brandhofer, Ziang Chen, Li-Wei Chen, Xianyue Zhao, Nan Du, Ilia Polian:
Exploring Gate-Diversity Enabled by Reconfigurable Memristive Technology. ICECS 2023: 1-5 - [c157]Witali Bartsch, Prosanta Gope, Elif Bilge Kavun, Owen Millwood, Andriy Panchenko, Aryan Mohammadi Pasikhani, Ilia Polian:
Design Rationale for Symbiotically Secure Key Management Systems in IoT and Beyond. ICISSP 2023: 583-591 - [c156]Ilia Polian, Nan Du, Werner Schindler:
Overview of Memristive Cryptography. NEWCAS 2023: 1-5 - [c155]Sebastian Brandhofer, Ilia Polian, Kevin Krsulich:
Optimal Qubit Reuse for Near-Term Quantum Computers. QCE 2023: 859-869 - 2022
- [c154]Kartik Nayak, Devanshi Upadhyaya, Francesco Regazzoni, Ilia Polian:
On the Limitations of Logic Locking the Approximate Circuits. AsianHOST 2022: 1-6 - [c153]Hussam Amrouch, Jens Anders, Steffen Becker, Maik Betka, Gerd Bleher, Peter Domanski, Nourhan Elhamawy, Thomas Ertl, Athanasios Gatzastras, Paul R. Genssler, Sebastian Hasler, Martin Heinrich, André van Hoorn, Hanieh Jafarzadeh, Ingmar Kallfass, Florian Klemme, Steffen Koch, Ralf Küsters, Andrés Lalama, Raphaël Latty, Yiwen Liao, Natalia Lylina, Zahra Paria Najafi-Haghi, Dirk Pflüger, Ilia Polian, Jochen Rivoir, Matthias Sauer, Denis Schwachhofer, Steffen Templin, Christian Volmer, Stefan Wagner, Daniel Weiskopf, Hans-Joachim Wunderlich, Bin Yang, Martin Zimmermann:
Intelligent Methods for Test and Reliability. DATE 2022: 969-974 - [c152]Roshwin Sengupta, Ilia Polian, John P. Hayes:
Stochastic Computing Architectures for Lightweight LSTM Neural Networks. DDECS 2022: 124-129 - [c151]Hussam Amrouch, Krishnendu Chakrabarty, Dirk Pflüger, Ilia Polian, Matthias Sauer, Matteo Sonza Reorda:
Machine Learning for Test, Diagnosis, Post-Silicon Validation and Yield Optimization. ETS 2022: 1-6 - [c150]Florian Neugebauer, Stefan Holst, Ilia Polian:
On the Impact of Hardware Timing Errors on Stochastic Computing based Neural Networks. ETS 2022: 1-6 - [c149]Swaroop Shankar Prasad, Ofer Hadar, Thang Vu, Ilia Polian:
Human vs. Automatic Detection of Deepfake Videos Over Noisy Channels. ICME 2022: 1-6 - [c148]Roshwin Sengupta, Ilia Polian, John P. Hayes:
Wavelet Transform Assisted Neural Networks for Human Activity Recognition. ISCAS 2022: 1254-1258 - [c147]Yanjun Ji, Sebastian Brandhofer, Ilia Polian:
Calibration-Aware Transpilation for Variational Quantum Optimization. QCE 2022: 204-214 - 2021
- [c146]Osnat Keren, Ilia Polian:
On resilience of security-oriented error detecting architectures against power attacks: a theoretical analysis. CF 2021: 229-237 - [c145]Ilia Polian, Frank Altmann, Tolga Arul, Christian Boit, Ralf Brederlow, Lucas Davi, Rolf Drechsler, Nan Du, Thomas Eisenbarth, Tim Güneysu, Sascha Hermann, Matthias Hiller, Rainer Leupers, Farhad Merchant, Thomas Mussenbrock, Stefan Katzenbeisser, Akash Kumar, Wolfgang Kunz, Thomas Mikolajick, Vivek Pachauri, Jean-Pierre Seifert, Frank Sill Torres, Jens Trommer:
Nano Security: From Nano-Electronics to Secure Systems. DATE 2021: 1334-1339 - [c144]Felipe Valencia, Ilia Polian, Francesco Regazzoni:
Extending Circuit Design Flow for Early Assessment of Fault Attack Vulnerabilities. DSD 2021: 385-388 - [c143]Jaume Abella, Sergi Alcaide, Jens Anders, Francisco Bas, Steffen Becker, Elke De Mulder, Nourhan Elhamawy, Frank K. Gürkaynak, Helena Handschuh, Carles Hernández, Michael Hutter, Leonidas Kosmidis, Ilia Polian, Matthias Sauer, Stefan Wagner, Francesco Regazzoni:
Security, Reliability and Test Aspects of the RISC-V Ecosystem. ETS 2021: 1-10 - [c142]Sebastian Brandhofer, Simon J. Devitt, Ilia Polian:
ArsoNISQ: Analyzing Quantum Algorithms on Near-Term Architectures. ETS 2021: 1-6 - [c141]Sebastian Brandhofer, Ilia Polian, Hans Peter Büchler:
Optimal Mapping for Near-Term Quantum Architectures based on Rydberg Atoms. ICCAD 2021: 1-7 - [c140]Davide Appello, H. H. Chen, Matthias Sauer, Ilia Polian, Paolo Bernardi, Matteo Sonza Reorda:
System-Level Test: State of the Art and Challenges. IOLTS 2021: 1-7 - [c139]Sebastian Brandhofer, Simon J. Devitt, Ilia Polian:
Error Analysis of the Variational Quantum Eigensolver Algorithm. NANOARCH 2021: 1-6 - [c138]Hussam Amrouch, Nan Du, Anteneh Gebregiorgis, Said Hamdioui, Ilia Polian:
Towards Reliable In-Memory Computing: From Emerging Devices to Post-von-Neumann Architectures. VLSI-SoC 2021: 1-6 - [c137]Hussam Amrouch, Animesh Basak Chowdhury, Wentian Jin, Ramesh Karri, Farshad Khorrami, Prashanth Krishnamurthy, Ilia Polian, Victor M. van Santen, Benjamin Tan, Sheldon X.-D. Tan:
Special Session: Machine Learning for Semiconductor Test and Reliability. VTS 2021: 1-11 - [c136]Sebastian Brandhofer, Simon J. Devitt, Thomas Wellens, Ilia Polian:
Special Session: Noisy Intermediate-Scale Quantum (NISQ) Computers - How They Work, How They Fail, How to Test Them? VTS 2021: 1-10 - 2020
- [c135]Ilia Polian, Jens Anders, Steffen Becker, Paolo Bernardi, Krishnendu Chakrabarty, Nourhan Elhamawy, Matthias Sauer, Adit D. Singh, Matteo Sonza Reorda, Stefan Wagner:
Exploring the Mysteries of System-Level Test. ATS 2020: 1-6 - [c134]Johann Knechtel, Elif Bilge Kavun, Francesco Regazzoni, Annelie Heuser, Anupam Chattopadhyay, Debdeep Mukhopadhyay, Soumyajit Dey, Yunsi Fei, Yaacov Belenky, Itamar Levi, Tim Güneysu, Patrick Schaumont, Ilia Polian:
Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. DATE 2020: 508-513 - [c133]Francesco Regazzoni, Ilia Polian:
Side Channel Attacks vs Approximate Computing. ACM Great Lakes Symposium on VLSI 2020: 321-326 - [c132]Francesco Regazzoni, Shivam Bhasin, Amir Alipour, Ihab Alshaer, Furkan Aydin, Aydin Aysu, Vincent Beroulle, Giorgio Di Natale, Paul D. Franzon, David Hély, Naofumi Homma, Akira Ito, Dirmanto Jap, Priyank Kashyap, Ilia Polian, Seetal Potluri, Rei Ueno, Elena-Ioana Vatajelu, Ville Yli-Mäyry:
Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. ICCAD 2020: 141:1-141:6 - [c131]Ponnanna Kelettira Muthappa, Florian Neugebauer, Ilia Polian, John P. Hayes:
Hardware-based Fast Real-time Image Classification with Stochastic Computing. ICCD 2020: 340-347 - [c130]Nourhan Elhamawy, Maël Gay, Ilia Polian:
An Open-Source Area-Optimized ECEG Cryptosystem in Hardware. ISVLSI 2020: 120-125 - [c129]Junseok Oh, Florian Neugebauer, Ilia Polian, John P. Hayes:
Retraining and Regularization to Optimize Neural Networks for Stochastic Computing. ISVLSI 2020: 246-251 - [c128]Swaroop Shankar Prasad, Ofer Hadar, Ilia Polian:
Detection of Malicious Spatial-Domain Steganography over Noisy Channels Using Convolutional Neural Networks. Media Watermarking, Security, and Forensics 2020 - 2019
- [c127]Florian Neugebauer, Ilia Polian, John P. Hayes:
On the maximum function in stochastic computing. CF 2019: 59-66 - [c126]Stefan Katzenbeisser, Ilia Polian, Francesco Regazzoni, Marc Stöttinger:
Security in Autonomous Systems. ETS 2019: 1-8 - [c125]Maël Gay, Tobias Paxian, Devanshi Upadhyaya, Bernd Becker, Ilia Polian:
Hardware-Oriented Algebraic Fault Attack Framework with Multiple Fault Injection Support. FDTC 2019: 25-32 - [c124]Florian Neugebauer, Ilia Polian, John P. Hayes:
On the Limits of Stochastic Computing. ICRC 2019: 98-105 - [c123]Nan Du, Mahdi Kiani, Xianyue Zhao, Danilo Bürger, Oliver G. Schmidt, Ramona Ecke, Stefan E. Schulz, Heidemarie Schmidt, Ilia Polian:
Electroforming-free Memristors for Hardware Security Primitives. IVSW 2019: 67-70 - [c122]Ilia Polian:
Fault Attacks on Cryptographic Circuits. NEWCAS 2019: 1-4 - [c121]Osnat Keren, Ilia Polian:
A comment on information leakage from robust code-based checkers detecting fault attacks on cryptographic primitives. PROOFS 2019: 49-63 - [c120]Felipe Valencia, Ilia Polian, Francesco Regazzoni:
Fault Sensitivity Analysis of Lattice-Based Post-Quantum Cryptographic Components. SAMOS 2019: 107-123 - 2018
- [c119]Batya Karp, Maël Gay, Osnat Keren, Ilia Polian:
Detection and Correction of Malicious and Natural Faults in Cryptographic Modules. PROOFS 2018: 68-82 - [c118]Batya Karp, Mael Gay, Osnat Keren, Ilia Polian:
Security-oriented Code-based Architectures for Mitigating Fault Attacks. DCIS 2018: 1-6 - [c117]Ilia Polian, Mael Gay:
Hardware-oriented Security in a Computer Science Curriculum. EWME 2018: 59-62 - [c116]Francesco Regazzoni, Cesare Alippi, Ilia Polian:
Security: the dark side of approximate computing? ICCAD 2018: 44 - [c115]Francesco Regazzoni, Austin G. Fowler, Ilia Polian:
Quantum era challenges for classical computers. SAMOS 2018: 173-178 - 2017
- [c114]Francesco Regazzoni, Ilia Polian:
Securing the hardware of cyber-physical systems. ASP-DAC 2017: 194-199 - [c113]Florian Neugebauer, Ilia Polian, John P. Hayes:
Framework for quantifying and managing accuracy in stochastic circuit design. DATE 2017: 1-6 - [c112]Matthias Sauer, Pascal Raiola, Linus Feiten, Bernd Becker, Ulrich Rührmair, Ilia Polian:
Sensitized path PUF: A lightweight embedded physical unclonable function. DATE 2017: 680-685 - [c111]Josef Kinseher, Leonhard Heis, Ilia Polian:
Analyzing the effects of peripheral circuit aging of embedded SRAM architectures. DATE 2017: 852-857 - [c110]Florian Neugebauer, Ilia Polian, John P. Hayes:
Building a Better Random Number Generator for Stochastic Computing. DSD 2017: 1-8 - [c109]Ilia Polian, Francesco Regazzoni:
Counteracting malicious faults in cryptographic circuits. ETS 2017: 1-10 - [c108]Jan Burchard, Mael Gay, Ange-Salomé Messeng Ekossono, Jan Horácek, Bernd Becker, Tobias Schubert, Martin Kreuzer, Ilia Polian:
AutoFault: Towards Automatic Construction of Algebraic Fault Attacks. FDTC 2017: 65-72 - [c107]Jan Burchard, Ange-Salomé Messeng Ekossono, Jan Horácek, Mael Gay, Bernd Becker, Tobias Schubert, Martin Kreuzer, Ilia Polian:
Towards mixed structural-functional models for algebraic fault attacks on ciphers. IVSW 2017: 7-12 - [c106]Ilia Polian, Francesco Regazzoni, Johanna Sepúlveda:
Introduction to hardware-oriented security for MPSoCs. SoCC 2017: 102-107 - 2016
- [c105]Matthias Sauer, Jie Jiang, Sven Reimer, Kohei Miyase, Xiaoqing Wen, Bernd Becker, Ilia Polian:
On Optimal Power-Aware Path Sensitization. ATS 2016: 179-184 - [c104]Josef Kinseher, Leonardo Bonet Zordan, Ilia Polian, Andreas Leininger:
Improving SRAM test quality by leveraging self-timed circuits. DATE 2016: 984-989 - [c103]Josef Kinseher, Moritz Völker, Leonardo Bonet Zordan, Ilia Polian:
Failure mechanisms and test methods for the SRAM TVC write-assist technique. ETS 2016: 1-2 - [c102]Victor Tomashevich, Ilia Polian:
Memory error resilient detection for massive MIMO systems. EUSIPCO 2016: 1623-1627 - [c101]Victor Tomashevich, Ilia Polian:
Detection Performance of MIMO Unique Word OFDM. WSA 2016: 1-8 - 2015
- [c100]Josef Kinseher, Leonardo Bonet Zordan, Ilia Polian:
On the Use of Assist Circuits for Improved Coupling Fault Detection in SRAMs. ATS 2015: 61-66 - [c99]Ilia Polian, Austin G. Fowler:
Design automation challenges for scalable quantum architectures. DAC 2015: 61:1-61:6 - [c98]Philipp Jovanovic, Ilia Polian:
Fault-based attacks on the Bel-T block cipher family. DATE 2015: 601-604 - [c97]Alexandru Paler, Ilia Polian, Kae Nemoto, Simon J. Devitt:
A Fully Fault-Tolerant Representation of Quantum Circuits. RC 2015: 139-154 - 2014
- [c96]Ilia Polian:
Technische Informatik in der universitären Lehre: Bestandsaufnahme, Herausforderungen, Perspektiven. Aspekte der Technischen Informatik 2014: 71-80 - [c95]Alexandru Paler, Simon J. Devitt, Kae Nemoto, Ilia Polian:
Software-based Pauli tracking in fault-tolerant quantum circuits. DATE 2014: 1-4 - [c94]Victor Tomashevich, Christina Gimmler-Dumont, Christian Fesl, Norbert Wehn, Ilia Polian:
A new architecture for minimum mean square error sorted QR decomposition for MIMO wireless communication systems. DDECS 2014: 246-249 - [c93]Victor Tomashevich, Yaara Neumeier, Raghavan Kumar, Osnat Keren, Ilia Polian:
Protecting cryptographic hardware against malicious attacks by nonlinear robust codes. DFT 2014: 40-45 - [c92]Ilia Polian, Jie Jiang, Adit D. Singh:
Detection conditions for errors in self-adaptive better-than-worst-case designs. ETS 2014: 1-6 - [c91]Matthias Sauer, Ilia Polian, Michael E. Imhof, Abdullah Mumtaz, Eric Schneider, Alexander Czutro, Hans-Joachim Wunderlich, Bernd Becker:
Variation-aware deterministic ATPG. ETS 2014: 1-6 - [c90]Raghavan Kumar, Philipp Jovanovic, Wayne P. Burleson, Ilia Polian:
Parametric Trojans for Fault-Injection Attacks on Cryptographic Hardware. FDTC 2014: 18-28 - [c89]Raghavan Kumar, Philipp Jovanovic, Ilia Polian:
Precise fault-injections using voltage and temperature manipulation for differential cryptanalysis. IOLTS 2014: 43-48 - [c88]Alexandru Paler, Simon J. Devitt, Kae Nemoto, Ilia Polian:
Cross-Level Validation of Topological Quantum Circuits. RC 2014: 189-200 - [c87]Alexander Czutro, Sudhakar M. Reddy, Ilia Polian, Bernd Becker:
SAT-Based Test Pattern Generation with Improved Dynamic Compaction. VLSID 2014: 56-61 - [c86]Ravi Kanth Uppu, Ravi Tej Uppu, Adit D. Singh, Ilia Polian:
Better-than-Worst-Case Timing Design with Latch Buffers on Short Paths. VLSID 2014: 133-138 - [c85]Victor Tomashevich, Christina Gimmler-Dumont, Norbert Wehn, Ilia Polian:
Reliability analysis of MIMO channel preprocessing by fault injection. WiSEE 2014: 1-6 - 2013
- [c84]Matthias Sauer, Sven Reimer, Ilia Polian, Tobias Schubert, Bernd Becker:
Provably optimal test cube generation using quantified boolean formula solving. ASP-DAC 2013: 533-539 - [c83]Jie Jiang, Marina Aparicio, Mariane Comte, Florence Azaïs, Michel Renovell, Ilia Polian:
MIRID: Mixed-Mode IR-Drop Induced Delay Simulator. Asian Test Symposium 2013: 177-182 - [c82]Matthias Sauer, Sven Reimer, Tobias Schubert, Ilia Polian, Bernd Becker:
Efficient SAT-based dynamic compaction and relaxation for longest sensitizable paths. DATE 2013: 448-453 - [c81]Ilia Polian, Martin Kreuzer:
Fault-based attacks on cryptographic hardware. DDECS 2013: 12-17 - [c80]Alexandru Paler, Josef Kinseher, Ilia Polian, John P. Hayes:
Approximate simulation of circuits with probabilistic behavior. DFTS 2013: 95-100 - [c79]Marina Aparicio, Mariane Comte, Florence Azaïs, Michel Renovell, Jie Jiang, Ilia Polian, Bernd Becker:
Pre-characterization procedure for a mixed mode simulation of IR-drop induced delays. LATW 2013: 1-6 - [c78]Ilia Polian, Mohammad Tehranipoor:
Special session 12A: Hot topic counterfeit IC identification: How can test help? VTS 2013: 1 - 2012
- [c77]Alexandru Paler, Ilia Polian, John P. Hayes:
Detection and diagnosis of faulty quantum circuits. ASP-DAC 2012: 181-186 - [c76]Ilia Polian:
Session Summary I: Quantum informatics: Classical circuit synthesis, resource optimisation and benchmarking. Asian Test Symposium 2012: 49 - [c75]Alexander Czutro, Michael E. Imhof, J. Jiang, Abdullah Mumtaz, Matthias Sauer, Bernd Becker, Ilia Polian, Hans-Joachim Wunderlich:
Variation-Aware Fault Grading. Asian Test Symposium 2012: 344-349 - [c74]Philipp Jovanovic, Martin Kreuzer, Ilia Polian:
A Fault Attack on the LED Block Cipher. COSADE 2012: 120-134 - [c73]Jie Jiang, Matthias Sauer, Alexander Czutro, Bernd Becker, Ilia Polian:
On the optimality of K longest path generation algorithm under memory constraints. DATE 2012: 418-423 - [c72]Linus Feiten, Matthias Sauer, Tobias Schubert, Alexander Czutro, Eberhard Böhl, Ilia Polian, Bernd Becker:
#SAT-based vulnerability analysis of security components - A case study. DFT 2012: 49-54 - [c71]Alexander Czutro, Matthias Sauer, Ilia Polian, Bernd Becker:
Multi-conditional SAT-ATPG for power-droop testing. ETS 2012: 1-6 - [c70]Matthias Sauer, Alexander Czutro, Bernd Becker, Ilia Polian:
On the quality of test vectors for post-silicon characterization. ETS 2012: 1-6 - [c69]Matthias Sauer, Alexander Czutro, Ilia Polian, Bernd Becker:
Small-delay-fault ATPG with waveform accuracy. ICCAD 2012: 30-36 - [c68]Victor Tomashevich, Sudarshan Srinivasan, Fabian Foerg, Ilia Polian:
Cross-level protection of circuits against faults and malicious attacks. IOLTS 2012: 150-155 - [c67]Matthias Sauer, Stefan Kupferschmid, Alexander Czutro, Ilia Polian, Sudhakar M. Reddy, Bernd Becker:
Functional test of small-delay faults using SAT and Craig interpolation. ITC 2012: 1-8 - [c66]Alexandru Paler, Simon J. Devitt, Kae Nemoto, Ilia Polian:
Synthesis of topological quantum circuits. NANOARCH 2012: 181-187 - [c65]Alexander Czutro, Matthias Sauer, Tobias Schubert, Ilia Polian, Bernd Becker:
SAT-ATPG using preferences for improved detection of complex defect mechanisms. VTS 2012: 170-175 - 2011
- [c64]Matthias Sauer, Jie Jiang, Alejandro Czutro, Ilia Polian, Bernd Becker:
Efficient SAT-Based Search for Longest Sensitisable Paths. Asian Test Symposium 2011: 108-113 - [c63]Philipp Klaus Krause, Ilia Polian:
Adaptive voltage over-scaling for resilient applications. DATE 2011: 944-949 - [c62]Matthias Sauer, Alexander Czutro, Tobias Schubert, Stefan Hillebrecht, Ilia Polian, Bernd Becker:
SAT-based analysis of sensitisable paths. DDECS 2011: 93-98 - [c61]Alexandru Paler, Armin Alaghi, Ilia Polian, John P. Hayes:
Tomographic Testing and Validation of Probabilistic Circuits. ETS 2011: 63-68 - [c60]Ilia Polian, Bernd Becker, Sybille Hellebrand, Hans-Joachim Wunderlich, Peter C. Maxwell:
Towards Variation-Aware Test Methods. ETS 2011: 219-225 - [c59]Matthias Sauer, Alejandro Czutro, Ilia Polian, Bernd Becker:
Estimation of component criticality in early design steps. IOLTS 2011: 104-110 - [c58]Matthias Sauer, Victor Tomashevich, Jörg Müller, Matthew Lewis, Andreas Spilla, Ilia Polian, Bernd Becker, Wolfram Burgard:
An FPGA-based framework for run-time injection and analysis of soft errors in microprocessors. IOLTS 2011: 182-185 - 2010
- [c57]Fabian Hopsch, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich:
Variation-Aware Fault Modeling. Asian Test Symposium 2010: 87-93 - [c56]Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich:
Massive statistical process variations: A grand challenge for testing nanoelectronic circuits. DSN Workshops 2010: 95-100 - [c55]Ilia Polian, John P. Hayes:
Advanced modeling of faults in Reversible circuits. EWDTS 2010: 376-381 - [c54]Ilia Polian:
Special session 4B: Panel low-power test and noise-aware test: Foes or friends? VTS 2010: 130 - 2009
- [c53]Alejandro Czutro, Ilia Polian, Piet Engelke, Sudhakar M. Reddy, Bernd Becker:
Dynamic Compaction in SAT-Based ATPG. Asian Test Symposium 2009: 187-190 - [c52]Viacheslav Izosimov, Ilia Polian, Paul Pop, Petru Eles, Zebo Peng:
Analysis and optimization of fault-tolerant embedded systems with hardened processors. DATE 2009: 682-687 - [c51]Kunal P. Ganeshpure, Ilia Polian, Sandip Kundu, Bernd Becker:
Reducing temperature variability by routing heat pipes. ACM Great Lakes Symposium on VLSI 2009: 63-68 - [c50]Marc Hunger, Sybille Hellebrand, Alejandro Czutro, Ilia Polian, Bernd Becker:
ATPG-based grading of strong fault-secureness. IOLTS 2009: 269-274 - [c49]Alejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker:
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis. VLSI Design 2009: 227-232 - [c48]Nicolas Houarche, Mariane Comte, Michel Renovell, Alejandro Czutro, Piet Engelke, Ilia Polian, Bernd Becker:
An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects. VTS 2009: 21-26 - 2008
- [c47]Piet Engelke, Ilia Polian, Jürgen Schlöffel, Bernd Becker:
Resistive Bridging Fault Simulation of Industrial Circuits. DATE 2008: 628-633 - [c46]Ilia Polian, Kohei Miyase, Yusuke Nakamura, Seiji Kajihara, Piet Engelke, Bernd Becker, Stefan Spinner, Xiaoqing Wen:
Diagnosis of Realistic Defects Based on the X-Fault Model. DDECS 2008: 263-266 - [c45]Ilia Polian, Sudhakar M. Reddy, Irith Pomeranz, Xun Tang, Bernd Becker:
On Reducing Circuit Malfunctions Caused by Soft Errors. DFT 2008: 245-253 - [c44]Ilia Polian, Wenjing Rao:
Selective Hardening of NanoPLA Circuits. DFT 2008: 263-271 - [c43]Damian Nowroth, Ilia Polian, Bernd Becker:
A study of cognitive resilience in a JPEG compressor. DSN 2008: 32-41 - [c42]Alejandro Czutro, Nicolas Houarche, Piet Engelke, Ilia Polian, Mariane Comte, Michel Renovell, Bernd Becker:
A Simulator of Small-Delay Faults Caused by Resistive-Open Defects. ETS 2008: 113-118 - [c41]Christian G. Zoellin, Hans-Joachim Wunderlich, Ilia Polian, Bernd Becker:
Selective Hardening in Early Design Steps. ETS 2008: 185-190 - [c40]Ilia Polian, Sudhakar M. Reddy, Bernd Becker:
Scalable Calculation of Logical Masking Effects for Selective Hardening Against Soft Errors. ISVLSI 2008: 257-262 - [c39]Stefan Hillebrecht, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng:
Extraction, Simulation and Test Generation for Interconnect Open Defects Based on Enhanced Aggressor-Victim Model. ITC 2008: 1-10 - [c38]Stefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng:
Automatic Test Pattern Generation for Interconnect Open Defects. VTS 2008: 181-186 - 2007
- [c37]Stefan Spinner, Jie Jiang, Ilia Polian, Piet Engelke, Bernd Becker:
Simulating Open-Via Defects. ATS 2007: 265-270 - [c36]Piet Engelke, Bettina Braitling, Ilia Polian, Michel Renovell, Bernd Becker:
SUPERB: Simulator Utilizing Parallel Evaluation of Resistive Bridges. ATS 2007: 433-438 - [c35]Ilia Polian, Damian Nowroth, Bernd Becker:
Identification of Critical Errors in Imaging Applications. IOLTS 2007: 201-202 - [c34]John P. Hayes, Ilia Polian, Bernd Becker:
An Analysis Framework for Transient-Error Tolerance. VTS 2007: 249-255 - 2006
- [c33]Piet Engelke, Ilia Polian, Hans Manhaeve, Michel Renovell, Bernd Becker:
Delta-IDDQ Testing of Resistive Short Defects. ATS 2006: 63-68 - [c32]Michel Renovell, Mariane Comte, Ilia Polian, Piet Engelke, Bernd Becker:
A Specific ATPG technique for Resistive Open with Sequence Recursive Dependency. ATS 2006: 273-278 - [c31]Ilia Polian, Hideo Fujiwara:
Functional constraints vs. test compression in scan-based delay testing. DATE 2006: 1039-1044 - [c30]Jochen Eisinger, Ilia Polian, Bernd Becker, Alexander Metzner, Stephan Thesing, Reinhard Wilhelm:
Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis. DDECS 2006: 15-20 - [c29]Ilia Polian, Bernd Becker, Masato Nakasato, Satoshi Ohtake, Hideo Fujiwara:
Low-Cost Hardening of Image Processing Applications Against Soft Errors. DFT 2006: 274-279 - [c28]Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd Becker:
Power Droop Testing. ICCD 2006: 243-250 - [c27]Sandip Kundu, Ilia Polian:
An Improved Technique for Reducing False Alarms Due to Soft Errors. IOLTS 2006: 105-110 - [c26]Jan Reineke, Björn Wachter, Stephan Thesing, Reinhard Wilhelm, Ilia Polian, Jochen Eisinger, Bernd Becker:
A Definition and Classification of Timing Anomalies. WCET 2006 - 2005
- [c25]Sandip Kundu, Piet Engelke, Ilia Polian, Bernd Becker:
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. Asian Test Symposium 2005: 266-271 - [c24]Ilia Polian, Thomas Fiehn, Bernd Becker, John P. Hayes:
A Family of Logical Fault Models for Reversible Circuits. Asian Test Symposium 2005: 422-427 - [c23]Ilia Polian, Alejandro Czutro, Bernd Becker:
Evolutionary Optimization in Code-Based Test Compression. DATE 2005: 1124-1129 - [c22]Ilia Polian, John P. Hayes, Sandip Kundu, Bernd Becker:
Transient fault characterization in dynamic noisy environments. ITC 2005: 10 - [c21]Ilia Polian, Sandip Kundu, Jean-Marc Gallière, Piet Engelke, Michel Renovell, Bernd Becker:
Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies. VTS 2005: 343-348 - 2004
- [c20]John P. Hayes, Ilia Polian, Bernd Becker:
Testing for Missing-Gate Faults in Reversible Circuits. Asian Test Symposium 2004: 100-105 - [c19]Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker:
Automatic test pattern generation for resistive bridging faults. ETS 2004: 160-165 - [c18]Yuyi Tang, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Piet Engelke, Ilia Polian, Bernd Becker:
X-Masking During Logic BIST and Its Impact on Defect Coverage. ITC 2004: 442-451 - [c17]Bernd Becker, Markus Behle, Friedrich Eisenbrand, Martin Fränzle, Marc Herbstritt, Christian Herde, Jörg Hoffmann, Daniel Kröning, Bernhard Nebel, Ilia Polian, Ralf Wimmer:
Bounded Model Checking and Inductive Verification of Hybrid Discrete-continuous Systems. MBMV 2004: 65-75 - [c16]Piet Engelke, Ilia Polian, Michel Renovell, Bharath Seshadri, Bernd Becker:
The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults. VTS 2004: 171-178 - 2003
- [c15]Ilia Polian, Bernd Becker, Sudhakar M. Reddy:
Evolutionary Optimization of Markov Sources for Pseudo Random Scan BIST. DATE 2003: 11184-11185 - [c14]Ilia Polian, Piet Engelke, Michel Renovell, Bernd Becker:
Modeling feedback bridging faults with non-zero resistance. ETW 2003: 91-96 - [c13]Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker:
Simulating Resistive Bridging and Stuck-At Faults. ITC 2003: 1051-1059 - [c12]Ilia Polian, Wolfgang Günther, Bernd Becker:
The Case for 2-POF. MBMV 2003: 164-173 - [c11]Ilia Polian, Bernd Becker:
Reducing ATE Cost in System-on-Chip Test. VLSI-SOC 2003: 337-342 - 2002
- [c10]Ilia Polian, Irith Pomeranz, Bernd Becker:
Exact Computation of Maximally Dominating Faults and Its Application to n-Detection Tests. Asian Test Symposium 2002: 2-14 - [c9]Jonathan Bradford, Hartmut Delong, Ilia Polian, Bernd Becker:
Simulating realistic bridging and crosstalk faults in an industrial setting. ETW 2002: 75-80 - [c8]Ilia Polian, Bernd Becker:
Stop & Go BIST. IOLTW 2002: 147-151 - [c7]Ilia Polian, Martin Keim, Nicolai Mallig, Bernd Becker:
Sequential n -Detection Criteria: Keep It Simple. IOLTW 2002: 189 - [c6]Ilia Polian, Piet Engelke, Bernd Becker:
Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics. ISMVL 2002: 216-223 - 2001
- [c5]Ilia Polian, Wolfgang Günther, Bernd Becker:
Efficient Pattern-Based Verification of Connections to IP Cores . Asian Test Symposium 2001: 443-448 - [c4]Ilia Polian, Bernd Becker:
Multiple Scan Chain Design for Two-Pattern Testing. LATW 2001: 156-161 - [c3]Ilia Polian, Wolfgang Günther, Bernd Becker:
Efficient Pattern-Based Verification of Connections to Intellectual Property Cores. MBMV (1) 2001: 111-120 - [c2]Ilia Polian, Bernd Becker:
Multiple Scan Chain Design for Two-Pattern Testing. VTS 2001: 88-93 - 1999
- [c1]Martin Keim, Ilia Polian, Harry Hengster, Bernd Becker:
A scalable BIST architecture for delay faults. ETW 1999: 98-103
Parts in Books or Collections
- 2003
- [p1]Ilia Polian:
On non-standard fault models for logic digital circuits. Ausgezeichnete Informatikdissertationen 2003: 169-178
Editorship
- 2019
- [e1]Ilia Polian, Marc Stöttinger:
Constructive Side-Channel Analysis and Secure Design - 10th International Workshop, COSADE 2019, Darmstadt, Germany, April 3-5, 2019, Proceedings. Lecture Notes in Computer Science 11421, Springer 2019, ISBN 978-3-030-16349-5 [contents]
Informal and Other Publications
- 2025
- [i16]Kangwei Xu, Denis Schwachhofer, Jason Blocklove, Ilia Polian, Peter Domanski, Dirk Pflüger, Siddharth Garg, Ramesh Karri, Ozgur Sinanoglu, Johann Knechtel, Zhuorui Zhao, Ulf Schlichtmann, Bing Li:
Large Language Models (LLMs) for Electronic Design Automation (EDA). CoRR abs/2508.20030 (2025) - 2024
- [i15]Denis Schwachhofer, Peter Domanski, Steffen Becker, Stefan Wagner, Matthias Sauer, Dirk Pflüger, Ilia Polian:
Large Language Models to Generate System-Level Test Programs Targeting Non-functional Properties. CoRR abs/2403.10086 (2024) - 2023
- [i14]Sebastian Brandhofer, Ilia Polian, Kevin Krsulich:
Optimal Qubit Reuse for Near-Term Quantum Computers. CoRR abs/2308.00194 (2023) - [i13]Ziang Chen, Li-Wei Chen, Xianyue Zhao, Kefeng Li, Heidemarie Schmidt, Ilia Polian, Nan Du:
Power-balanced Memristive Cryptographic Implementation Against Side Channel Attacks. CoRR abs/2312.01170 (2023) - 2022
- [i12]Sahitya Yarragolla, Nan Du, Torben Hemke, Xianyue Zhao, Ziang Chen, Ilia Polian, Thomas Mussenbrock:
Physics inspired compact modelling of BiFeO$_3$ based memristors for hardware security applications. CoRR abs/2210.03465 (2022) - 2021
- [i11]Ilia Polian, Jens Anders, Steffen Becker, Paolo Bernardi, Krishnendu Chakrabarty, Nourhan Elhamawy, Matthias Sauer, Adit D. Singh, Matteo Sonza Reorda, Stefan Wagner:
Exploring the Mysteries of System-Level Test. CoRR abs/2103.06656 (2021) - [i10]Sebastian Brandhofer, Hans Peter Büchler, Ilia Polian:
Optimal Mapping for Near-Term Quantum Architectures based on Rydberg Atoms. CoRR abs/2109.04179 (2021) - 2020
- [i9]Johann Knechtel, Elif Bilge Kavun, Francesco Regazzoni, Annelie Heuser, Anupam Chattopadhyay, Debdeep Mukhopadhyay, Soumyajit Dey, Yunsi Fei, Yaacov Belenky, Itamar Levi, Tim Güneysu, Patrick Schaumont, Ilia Polian:
Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. CoRR abs/2001.09672 (2020) - 2019
- [i8]Divya Arora, Ilia Polian, Francesco Regazzoni, Patrick Schaumont:
Secure Composition for Hardware Systems (Dagstuhl Seminar 19301). Dagstuhl Reports 9(7): 94-116 (2019) - 2016
- [i7]Osnat Keren, Ilia Polian, Mark Tehranipoor:
Hardware Security (Dagstuhl Seminar 16202). Dagstuhl Reports 6(5): 72-93 (2016) - 2014
- [i6]Raghavan Kumar, Philipp Jovanovic, Ilia Polian:
Precise Fault-Injections using Voltage and Temperature Manipulation for Differential Cryptanalysis. IACR Cryptol. ePrint Arch. 2014: 782 (2014) - [i5]Raghavan Kumar, Philipp Jovanovic, Wayne P. Burleson, Ilia Polian:
Parametric Trojans for Fault-Injection Attacks on Cryptographic Hardware. IACR Cryptol. ePrint Arch. 2014: 783 (2014) - 2013
- [i4]Philipp Jovanovic, Martin Kreuzer, Ilia Polian:
Multi-Stage Fault Attacks on Block Ciphers. IACR Cryptol. ePrint Arch. 2013: 778 (2013) - 2012
- [i3]Philipp Jovanovic, Martin Kreuzer, Ilia Polian:
An Algebraic Fault Attack on the LED Block Cipher. IACR Cryptol. ePrint Arch. 2012: 400 (2012) - 2007
- [i2]Ilia Polian, Alejandro Czutro, Bernd Becker:
Evolutionary Optimization in Code-Based Test Compression. CoRR abs/0710.4670 (2007) - [i1]Stefan Spinner, Julian Bartholomeyczik, Bernd Becker, Michael Doelle, Oliver Paul, Ilia Polian, Roland Roth, Karl Seitz, Patrick Ruther:
Electromechanical Reliability Testing of Three-Axial Silicon Force Sensors. CoRR abs/0711.3289 (2007)
Coauthor Index
[j25] [j24] [j21] [j20] [j18] [j17] [j16] [j14] [j13] [j12] [j10] [j9] [j8] [j7] [j6] [j4] [j3] [j2] [j1] [c162] [c125] [c112] [c108] [c107] [c105] [c91] [c87] [c84] [c82] [c79] [c75] [c73] [c72] [c71] [c70] [c69] [c67] [c65] [c64] [c62] [c60] [c59] [c58] [c57] [c56] [c53] [c51] [c50] [c49] [c48] [c47] [c46] [c45] [c43] [c42] [c41] [c40] [c39] [c38] [c37] [c36] [c35] [c34] [c33] [c32] [c30] [c29] [c28] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [c12] [c11] [c10] [c9] [c8] [c7] [c6] [c5] [c4] [c3] [c2] [c1] [i2] [i1]
Alexander Czutro
aka: Alejandro Czutro
aka: Alejandro Czutro
Mael Gay
aka: Maël Gay
aka: Maël Gay
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last updated on 2026-06-21 23:07 CEST by the dblp team
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