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ORCIDIEEE Open Journal of Circuits and Systems, Volume 7
Volume 7, 2026
- Jaewon Shin
, Mototsugu Hamada, Atsutake Kosuge:
A Connectivity-Aware Via-Programmable DNN Processor Using a Single Photomask. 11-20 - Johan Holmstedt, Henrik Sjöland:
Spur Analysis and Linearity Enhancement in Fractional-N Phase Locked Loops Through Parallel Sigma-Delta Modulators With Time Offsets. 21-32 - Meysam Akbari, Zahra Hashemi, Erika Covi, Kea-Tiong Tang:
A High Gain Operational Amplifier With Dual-Tail Source Architecture for Fast Slewing. 11-20 - Fakhrul Zaman Rokhani, Mircea R. Stan, Maurizio Palesi, Kun-Chih Chen:
Thermal-Aware NoC for AI Computing: Tools, Algorithms, and Applications. 43-59 - Chung-Yi Wang, Ping-Hsuan Hsieh, Zi-Cin Wang:
Analog Convolution Circuit System Implemented With Capacitor Array Superposition. 60-68 - Kent Edrian Lozada, Bo Gao, Raymond Mabilangan, Charlie Tahar, Kun-Woo Park, Young-Hun Moon, Kwan-Hoon Song, Seung-Tak Ryu:
A SAR-Assisted Continuous-Time M-0 MASH Delta-Sigma Modulator With Digital-Domain Noise Leakage Shaping. 69-81 - Utkarsh Kumar, Ankit Mittal, Ufuk Muncuk, Aatmesh Shrivastava:
Non-Iterative Square-Wave Modeling of Multistage CMOS Dickson Rectifiers for RF Energy Harvesting. 82-94 - Ramzy Rammouz, Vasileios Adamopoulos, Ivan D. Castro Miller, Wim Sijbers, Ria Sijabat, Dimitrios Firfilionis, Qiuyang Lin, Benjamin Calmé, Tom Torfs:
A Miniaturized Ingestible Capsule With Integrated ASIC for Energy-Efficient Sensing in the Gastrointestinal Tract. 95-104 - Richelle L. Smith, Shakib Mahmood, Carl W. Werner, Thomas H. Lee, Masum Hossain:
Equalization and Coding Techniques for Edge Modulation Signaling. 105-118 - Won Namgoong:
On Feedforward Cancellation of Third-Order Nonlinear Distortion in Wideband Receivers. 119-131 - Chih-Man Chang, Kea-Tiong Tang:
A PPWM-Based CMOS Wireless Power Charger With Active Bias-Clamp Cascode Biasing and Load-Adaptive Rectifier Sizing. 132-143 - Luke Parker, Suma George Cardwell, Frances S. Chance, Scott Koziol:
Gain Modulation Using Shunting Inhibition in a Biased Subthreshold CMOS Dendrite. 144-157 - Vassilis Alimisis, Andreas Papathanasiou, Vasileios Moustakas, Anna Mylona, Christos Dimas, Paul P. Sotiriadis:
A Low-Power, Analog-Integrated, Current-Mode, and Fully Tunable Artificial Neural Network Classifier Architecture for Biomedical Engineering Applications. 158-172 - Mauricio Velazquez Lopez, Nikolas P. Papadopoulos, Francois Berghmans, Kris Myny:
9.4 μW 285 Samples/s Capacitance to Digital Converter for Large Area Active EWOD Arrays in Thin-Film Transistor Technology. 173-183 - Thomas Neuner, Shahar Kvatinsky:
Impact of Voltage-Dependent Resistance Ratio in HfO2-Based Resistive RAM on Non-Stateful Logic. 184-192 - Viet Nguyen, Peter Kilgannon, Ciara Lambkin, Hieu Minh Nguyen, Robert Bogdan Staszewski:
Machine-Learning Variation-Aware Co-Design for Analog Linearization of VCO-ADCs. 193-205 - Emanuele Sacchi, Francesco Zanetto, Andres Ivan Martinez, SeyedMohammad SeyedinNavadeh, Francesco Morichetti, Andrea Melloni, Marco Sampietro, Giorgio Ferrari:
8-Channel CMOS Chip for Real-Time Control of Integrated Silicon Photonic Processors. 206-217 - Jinhen Lee, Victor Adrian, Joseph S. Chang:
A Novel Quadrature-Phase Sampling Technique for Filterless, Low-Complexity, High-Alias-Suppression in VCO-ADCs. 218-229 - Chen Wang, Xiaonan Xing, Seyed Mojtaba Sadati Faramarzi, Aris Siskos, Qiuyang Lin, Yannick Baines, Chutham Sawigun, Mauricio Velazquez Lopez, Florian De Roose, Jan Genoe, Nikolas P. Papadopoulos, Kris Myny:
A High-Gain, Low-Voltage Operational Amplifier With Bias-Stress and PVT Robustness for Large-Area Temperature Sensing on LTPS Substrates. 230-242 - Rabia Fatima Riaz, Ronny Henker, Frank Ellinger:
Modulation Bandwidth Investigation of Voltage-Controlled Oscillators Under Periodic Linear Frequency Modulation. 243-254 - Aldo Pena-Perez, Hugo Hernandez-Herrera, Llorenç Fanals-i-Batllori, Lorenzo Rota, Hyunjoon Kim, Aseem Gupta, Bojan Markovic, Gang Liu, Filippo Mele, Pietro King, Christos Bakalis, Dionísio Doering, Namit Mishra, Angelo Dragone:
A Low-Power Single-Ended SAR ADC With Energy-Efficient Differential Switching for Ultrafast X-Ray Imagers. 255-268 - Xianyue Zhao, Alon Ascoli, Ahmet Samil Demirkol, Ioannis Messaris, Jan Dellith, Ilia Polian, Heidemarie Krüger, Ronald Tetzlaff, Nan Du:
Chaotic Circuit Design Leveraging the Analog Nonlinear Dynamics of a Self-Rectifying Memristor. 269-281 - Juliano B. Lima, Daniel Panario, José R. de Oliveira Neto:
Pseudo-Chebyshev Functions Over Finite Fields. 282-295 - Zeyuan Li, Wenyi Yan, Lu Gan, Guoquan Li, Hongqing Liu:
An FPGA-Calibrated Modulo ADC for High-Dynamic-Range Signal Acquisition. 296-307 - Alireza Akbarpour Bazargani, Hossein Shakiba, David A. Johns:
A Ping-Pong Integrating FFE for Wireline SerDes Applications. 308-318 - Yi-Fu Chen, Bo-Ray Chen, Yun-Yin Kuo, Philex Ming-Yan Fan:
A Piecewise Linear Model of Loss Estimation for Switched-Inductor Power Management Integrated Circuits. 319-329 - Reza Papi, Benoit Gosselin:
A 73-dB PSR Trimless CMOS-Only Subthreshold Current-Mode Voltage Reference for Harsh-Environment Operation Using CTAT Current Subtraction. 330-340 - Javad Gorji, Luis A. Camuñas-Mesa, Shanthi Pavan, José M. de la Rosa:
A GHz-Range Single-Bit Bandpass Delta-Sigma Modulator With FIR-DACs Achieving 64-dB SNDR Over 20-MHz Bandwidth. 341-352 - Benhao Jin, Zhiming Fan, Giovanni Crupi, Jialin Cai:
Design of a Hybrid Asymmetric LMBA With High Linearity Based on Improved Particle Swarm Optimization Method. 353-365 - Wenzel Maier, Amilcar Flamarion Querubini Gonçalves, Ricardo Quadros Machado:
Cost-Effective and Space-Saving AC/DC Solid-State Relay Without Potential Separation. 366-377 - Maria Khan, Jari Nurmi:
A Comprehensive Survey on Canonical Signed Digit (CSD)-Based Multiplier Architectures: From Foundations to Modern Low-Power Implementations (1970-2025). 378-395 - Julia Nako, Georgia Tsirimokou, Costas Psychalinos, Ahmed S. Elwakil:
Filters With Gamma Kernel Impulse Response: Realization and Application in Auditory Systems. 396-403 - Muhammad Arham Sohail, Baley Heyntsen, Sohail Safdar, Simon Y. Foo, Muhammad Awais Bin Altaf:
A 1.0 V, 5.36-μW Single-Lead ECG SoC With Chopper-Stabilized AFE, Event-Driven OvA LSVM, and PACER On-Chip False-Alarm Suppression. 404-417 - Arnab Kumar Biswas:
An IEEE-754 FP32 Marsaglia-Polar Gaussian RNG on FPGA With AES-CTR Uniform Feeder. 418-433 - Tim Oberschulte, Enno Sievers, Holger Blume:
RRNS Arith Lib - Open-Source Redundant Residue Number System Arithmetics for Reliable Circuits. 434-446 - Piero Angeletti, Antonio Morini, Antoine Roederer, Giovanni Toso:
Synthesis of Lossless Multiports as Minimum Depth Chessboard Networks. 447-464 - Stefan Scholze, Johannes Partzsch, Sebastian Höppner, Florian Kelber, Andreas Dixius, Marco Stolba, Sirine Arfa, Marc Berthel, Georg Ellguth, Jim D. Garside, Hector A. Gonzalez, Stephan Hartmann, Thomas Kiel-Hocker, Dongwei Hu, Matthias Jobst, Khaleelulla Khan Nazeer, Tim Langer, Chen Liu, Gengting Liu, Matthias Lohrmann, Mantas Mikaitis, Felix Neumärker, Amirhossein Rostami, Stefan Schiefer, Tilo Schubert, Delong Shang, Bernhard Vogginger, Yexin Yan, Steve Furber, Christian Mayr:
The SpiNNaker2 Chip: A Many-Core Platform for Flexible and Scalable Brain-Inspired Computing. 465-478
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