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ORCIDDTTIS 2024, Aix-En-Provence, France
- IEEE International Conference on Design, Test and Technology of Integrated Systems, DTTIS 2024, Aix-En-Provence, France, October 14-16, 2024. IEEE 2024, ISBN 979-8-3503-6312-8
- Natalia Cherezova, Maksim Jenihhin, Artur Jutman:
IJTAG-compatible Symptom-based SEU Monitors for FPGA DNN Accelerators. 1-6 - Noemie Couzi, Jérémy Postel-Pellerin, Hassen Aziza, Alexandre Malherbe, Abderrezak Marzaki, Stephan Niel:
Optimization of digital transistors for low-cost and low-power IoT applications in 40nm technology. 1-7 - Celine Belabbas, S. Perrin, R. Habhab, V. Della Marca, P. Masson, P. Canet, J.-M. Portal, T. Kempf, N. Miridi, M. Mantelli, S. Niel, A. Regnier:
Punch-through variability in buried channel transistors. 1-5 - Domenico Zito, Michele Spasaro:
Benchmarking and Validation of Sub-mW 30GHz VG-LNAs in 22nm FDSOI CMOS for 5G/6G Phased-Array Receivers. 1-5 - Jimmy Fort, Clement Champeix, Nicolas Borrel:
LDO comparison with new Push-Pulled Flipped Voltage Follower topology for transient response improvement. 1-5 - Salvatore Pappalardo, Ali Piri, Annachiara Ruospo, Bastien Deveautour, Ernesto Sánchez
, Alberto Bosio:
Reliable and Efficient hardware for Trustworthy Deep Neural Networks. 1-5 - Antonio Porsia, Annachiara Ruospo, Ernesto Sánchez:
AI Eye Charts: measuring the visual acuity of Neural Networks with test images. 1-5 - Raphael R. N. Souza, Agord M. Pinto, Roberto Lacerda de Orio, Leandro Tiago Manêra, Eduardo R. de Lima:
LC-VCO with 1.6 GHz Tuning Range and Switched Cross-Coupled Core for Power Optimizing. 1-6 - Agord de Matos Pinto Júnior, Raphael Ronald Noal Souza, Eduardo Rodrigues de Lima, Cassia Maria Chagas, Leandro Tiago Manêra:
Voltage-Controlled Ring Oscillator with Reliability Criterion for Radiation Effects. 1-6 - Bile Mohamed Bile, Abderrezzak Cherifi, Kamal Meghriche, Hassan Ali Barkad, Riad Djebarra:
Cancelation of successive low-rank harmonics and homopolar voltage, by using Pulse Width and Height Modulation (PWHM) in a new topology of three-phase six-level inverter. 1-6 - Ndricim Ferko, Mohand Arab Djeziri, Hiba Al-Sheikh, Nazih Moubayed, Marc Bendahan, Jean-Luc Seguin:
Detection and Estimation of Ethanol Concentration in a Disturbed Environment Utilizing Random Forest. 1-5 - Cedric Hermet, Luc Favre, Stéphanie Escoubas, Salvatore De Siena, Robert Diperi:
Experimental Study of Force Induced by Probe Length Influence on Electrical Contact Resistance of Pillar Bump-Flat Vertical Probe Interaction during Wafer Electrical Test. 1-6 - Francesco Daghero, Gabriele Faraone, Michelangelo Grosso, Daniele Jahier Pagliari, Nicola Di Carolo, Giovanna Antonella Franchino, Dario Licastro, Eugenio Serianni:
Machine Learning-based feasibility estimation of digital blocks in BCD technology. 1-6 - Nima Kolahimahmoudi, Giorgio Insinga, Stefano Roggi, Josef Niederl, Paolo Bernardi:
A 6-bit Low-Area Hybrid ADC Design For System-on-Chip Measurements. 1-6 - Nicolò Bellarmino, Riccardo Cantoro, Martin Huch, Tobias Kilian, Ulf Schlichtmann, Giovanni Squillero:
Embedded Feature Selection in MCU Performance Screening. 1-6 - Régis Leveugle, Mounir Benabdenbi, Ahmed Al Kaf, Luc Noizette:
Combining Acceleration and Approximation in Dependable Edge AI: Optimization Methodology and Tools Applied to a Case Study. 1-6 - Letícia Maria Bolzani Pöhls:
Lifecycle Management of RRAMs: Quality and Reliability. 1-4 - Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante:
Enhancing Automotive Embedded Applications: A Comprehensive Evaluation of Control Flow Checking Methods. 1-6 - Felipe Artemio-Schoulten, Rémy Vauché, Jean Gaubert, Sylvain Bourdel, André Augusto Mariano:
IR-UWB Synthesizer based on a Non-Uniformly Sampled Envelope for High Side-lobes Rejection. 1-4 - Haneen G. Hezayyin, Mahta Mayahinia, Mehdi B. Tahoori:
Testing ReRAM-based TCAM for Computation-in-Memory Applications. 1-4 - Jérémy Bonnet, Stéphane Meillére, Fabien Granoux, Wenceslas Rahajandraibe:
Structure for characterization of MOS transistors in 28FD-SOI technology. 1-5 - Florian Pebay-Peyroula, Licinius-Pompiliu Benea, Mikael Carmona, Romain Wacquez:
OpenTRNG: an open-source initiative for ring-oscillator based TRNGs. 1-6 - Sepide Saeedi, Alessio Carpegna, Alessandro Savino, Stefano Di Carlo:
Fast Exploration of the Impact of Precision Reduction on Spiking Neural Networks. 1-6 - Mathieu Guerin, Fayrouz Haddad, Wenceslas Rahajandraibe, Blaise Ravelo:
Investigation on the Design of LP-NGD Analog System with RL-Network. 1-5 - Marina Ruggeri, Patrick Calenzo, Frédéric Morancho, Lia Masoero, Rosalia Germana:
Optimization of senseFET for current sensing in Low Voltage power integrated systems. 1-6 - S. Al Zaouk, Rym Assila Belhadj Mefteh, Rémy Vauché, R. Abdeddaim, Nicolas Dehaese, Mathieu Guerin:
Evaluation of Human Body Communications Pathloss using Capacitive Coupling. 1-4 - Salvatore Pappalardo, Bastien Deveautour, Alberto Bosio:
How Systolic Array Dataflow impacts on the resilience to hardware faults. 1-6 - Fatma Khayat, Dorra Nasr, Mohamed Hadj Said, Mounir Mansour, Fares Tounsi:
Design Enhancement of Folded Beams Attachment for MEMS-Based Triaxial Accelerometer. 1-6 - Ahmed Hassan Abdoul-Aziz, Abderrezzak Cherifi, Hadri Ferhat, Hassan Ali Barkad:
Three-phase inverter without PWM for on-board actuator. 1-6 - Jonas Pellegrino, Hassen Aziza, Mathieu Guerin, Pascal Taranto:
Design and Characterization of an Integrated Multi-Sensor Device for Air Quality Monitoring. 1-6 - Agord M. Pinto, Raphael R. N. Souza, Jorge E. V. Solano, Eduardo Rodrigues de Lima, Leandro Tiago Manêra:
LC-VCO Design with Switched Varactor Array for L-Band in 65 nm CMOS Technology. 1-6 - Ben Lok, Si Diep, Thomas Pham, Nicholas Madrid, Mit Shah, Andrew Westall, Hamzeh Dessouki, Linh Truong, Andrew Davis:
Extreme Temperature Automotive Testing. 1-8 - Lucas Antunes Tambara, Paul Devoge, Pascal Masson, Julien Amouroux, Julien Dura, C. Rivero, Franck Julien:
MOSFET electron mobility enhancement using source/drain recess. 1-4 - Wafa Zitouni, Rémy Vauché, Hassen Aziza, Laila Ayache, Alaa Makdissi:
Power Consumption Reduction in Integrated Pacemakers: Design Strategies for Cortex-M0+ Processors. 1-7 - Elena Venuti, Davide Appello, Riccardo Vettori, Federico Fazio, Rosalia Biondi, Chiara Lauria, Tiziana Bertoncelli, Giancarlo Guida, Marco Occhiali:
Testing challenges along WBG and UWBG devices roadmap. 1-10 - Theofilos Spyrou, Artemis Zografou, Said Hamdioui, Anteneh Gebregiorgis:
Fault Tolerant Design for Memristor-based AI Accelerators. 1-4 - D. Ronga, Xhesila Xhafa, Eric Faehn, Patrick Girard, Thibault Vayssade, Arnaud Virazel:
Producing a Bidirectional ATPG Compliant Verilog-HDL Memory Model of SRAM. 1-6
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