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ORCID17th LASCAS 2026: Arequipa, Peru
- 17th IEEE Latin America Symposium on Circuits and System, LASCAS 2026, Arequipa, Peru, February 24-27, 2026. IEEE 2026, ISBN 979-8-3315-7097-2
- Kendall Rivera-Solano, Luis G. León-Vega, Erick Carvajal Barboza, Jorge Castro-Godínez:
Machine Learning-Based Error Estimation for Efficient Approximate Logic Synthesis. 1-5 - Andrés Tarazona Moreno, Sergio Oliveros Sepúlveda, Jorge Angarita Pérez, Javier Ardila:
Implementation of Dynamically Adjusted Load Technique for Reducing Start-Up Time in a 32.768 kHz Crystal Oscillator in 28 nm CMOS Process. 1-5 - Lautaro N. Petrauskas
, Bahman Kheradmand Boroujeni, Frank Ellinger:
A Flexible Charge-Based Differential Capacitance Sensor Using IGZO TFTs for Insect Detection. 1-5 - Mariana Siniscalchi, Carlos Galup-Montoro:
Dynamic Model of a Six-Transistor Schmitt Trigger in Weak Inversion. 1-5 - Diana N. Maldonado R., G. Sebastian Eslava, Kevin D. Patino-Sosa:
Design, Implementation and Verification of an Open-Source ASIC for Grayscale and Sobel Edge Detection. 1-5 - Virgile Colrat, David Gaidioz, Andres Asprilla, Frédéric Paillardet, Andreia Cathelin, Yann Deval:
Sequential Dual-Loop Digital and Analog PLL Synthesizer for Fast-Locking IoT Applications in 18nm FD-SOI CMOS. 1-4 - Henrique Seidel, Morgana da Rosa, Rodrigo Lopes, Sérgio Almeida, Eduardo A. C. da Costa, Rafael Soares:
Energy-Efficient VLSI Exponential Function Combining a Fourth-Order Maclaurin Series and Horner's Method. 1-5 - Rafael Gomes, Mateus Giesbrecht, Fabiano Fruett:
Study and Implementation of a Partial Discharge Detection System: An Optimized Front-End Circuit for Continuous Monitoring. 1-5 - Mohammad Hasan Ahmadilivani, Josie E. Rodriguez Condia, Maksim Jenihhin, Matteo Sonza Reorda:
Investigating the Impact of Soft Errors in GPU-Accelerated Sparse DNNs. 1-5 - Nicolás Urbano Pintos, Emanuel Trabes, Carlos Valderrama, Alaeddine Aajouj, Héctor A. Lacomi:
Edge-Accelerated Monocular Depth Estimation: A Quantized U-Net on Kria KV260 for Real-Time Interior Scenarios. 1-5 - Castalia Leiva-Cordero, Arys Carrasquilla-Batista, Gabriela Ortiz-León:
Design of a Rehabilitation Device for Hand Grip and Wrist Mobility with an Interactive Interface and IoT Capabilities. 1-5 - Lucas M. Leipnitz de Fraga, Cláudio Machado Diniz:
Intra-Frame Prediction Hardware Architecture for VVC Exploring Approximation and Reuse. 1-5 - Ernesto Cristopher Villegas Castillo, Carlos Silva Cárdenas, Michael Glaß:
Early Safety Analysis of Software Test Libraries for Automotive SoCs Based on Virtual Prototyping. 1-5 - Ilan Sabaj, Santiago Bernardez, Ignacio Valettute, Mariana Siniscalchi:
Current-Starved Inverter Cell Design Trade-Offs for Single Capacitively Coupled Ring VCOs. 1-5 - Ettore Napoli:
VLSI Implementation of Alphaevolve Based Rank-48 Algorithm for 4×4 Real-Valued Matrix Multiplication. 1-4 - Allan Schuch, Gustavo Rehbein, Vítor Costa, Daniel Palomino, Marcelo Schiavon Porto:
A GPU Hardware Encoder Tools and Coding Efficiency Analysis on Point Cloud Compression. 1-5 - Adson Duarte, Enthony Bohm, Guilherme Corrêa, Attilio Fiandrotti, Bruno Zatt, Daniel Palomino:
CNN-Driven Fast Intra-Mode Decision Solution for the Angular Modes in the VVC Standard. 1-5 - Sara Awada, Hiba Al Youssef, Orazio Aiello, Roberto La Rosa, Ali Ibrahim:
When Hardware-NAS Meets Knowledge Distillation to Reduce Energy Consumption in Intelligent Sensing Systems. 1-5 - Yufei Xing, Torsten Lehmann:
A 3V High Gain Three-Stage Fully Differential Operational Amplifier in Flexible TFT Technology. 1-5 - Bruno Gambim, Fabricio Lorenzon, Sergio Bampi, Mateus Grellert:
Power-Efficient LSTM Design Using Approximate Computing. 1-5 - Leandro Tavares, Ruhan A. Conceição, Wen-Hsiao Peng, Luciano Agostini, Marcelo Schiavon Porto, Guilherme Corrêa:
Assessing the Domain Gap: Evaluation of STDF for Enhancing Videos Compressed by Neural Codecs. 1-5 - Patricia Gonzalez-Guerrero, Panagiotis Zarkos, Carl Grace, George Michelogiannakis:
A Novel 1-Bit Adder Cell and Filters for Oversampling Superconducting ADCs. 1-5 - Léopold Van Brandt, Grégoire Brandsteert, Denis Flandre:
On the Excitability of Ultra-Low-Power CMOS Analog Spiking Neurons. 1-5 - Johan Campos-Cerdas, Arys Carrasquilla-Batista, Gabriela Ortiz-León:
Development of a Low-Cost Passive and Active Leg Rehabilitation Device with an Interactive Interface and IoT Capabilities. 1-5 - Ali Ibrahim, Hiba Al Youssef, Orazio Aiello, Roberto La Rosa:
On-Device Intelligence for Energy-Autonomous Wireless Sensor Nodes: A Benchmarking Study on Energy and Complexity. 1-4 - Elias Ramos, Augusto Weber, Fernando Pedrazzi Pozzer, Ewerton Santos, Mateus B. Rutzig, João Baptista dos Santos Martins, Ricardo Reis:
A New Error Detector and Corrector Based on the Chaos of Boolean Sequences. 1-5 - David Cruz Santiago, Habib M. Ammari:
An Efficient and Cost-Aware Approach to Hole Restoration in Heterogeneous Wireless Sensor Networks Using Geometric Inversion. 1-5 - Lucas Ribeiro, Ivan Saraiva Silva, Ricardo P. Jacobi:
Energy-Efficient Cache Configuration Prediction Using Machine Learning on Basic Blocks. 1-5 - Rafael Knust, Thiago Brito, Fernanda D. V. R. Oliveira, Fabián Olivera:
Evolutionary Optimization for Low-Voltage, Wide-Temperature Range SRAM Cell Designs. 1-5 - Lucas Pereira do Amaral, Pedro Tauã Lopes Pereira, Mateus Grellert, Gabriel Luca Nazar:
ASIC Design and Implementation of Low-Latency and High-Throughput FFT and IFFT. 1-5 - Paulo Realpe-Muñoz, Jorge Erazo-Aux, Jaime Velasco-Medina:
High-Reliability True Random Number Generator With Real-Time Entropy Monitor. 1-5 - Juan-David Guerrero-Balaguera, Robert Limas Sierra, Gustavo Vilar de Farias, Sergiu-Mohamed Abed, Ahmet Cagri Bagbaba, Josie E. Rodriguez Condia:
Analyzing Hardware Accelerators' Reliability: From Design Exploration to Fast Evaluation with Hyperscalers. 1-5 - Anderson G. Araujo, Lucas B. B. Santana, Edward D. Moreno:
Comparative Analysis of Benchmarks in Machine Learning and Deep Learning. 1-5 - David Mendoza, Alberto Sánchez:
A Pipeline-Based Genetic Algorithm for Time-Critical Systems. 1-5 - Rodrigo Feldens, Sergio Bampi, Felipe Sampaio:
Complexity vs. Prevalence Assessment for Prediction Steps for VVenC Encoding Profiles. 1-5 - Juan Sapriza, Beatrice Grassano, Alessio Naclerio, Filippo Quadri, Tommaso Terzano, David Mallasén, Pasquale Davide Schiavone, Robin Leplae, Jérémie Moullet, Alexandre Levisse, Christoph Müller, Mariagrazia Graziano, Matías R. Miguez, David Atienza:
HEEPidermis: A Versatile SoC for BioZ Recording. 1-5 - Vanessa Aldrighi, Denis Maass, Ruhan A. Conceição, Wen-Hsiao Peng, Marcelo Schiavon Porto, Luciano Agostini:
A FHD@30fps Hardware Design for WSiLU Activation Function for Neural Video Coding. 1-5 - Vanessa M. Da F. Botinelly, Filipe F. Caetano, Osamu Saotome, Lucas Compassi Severo:
A Tradeoff-Based Sizing Methodology for Low-Power ULV RF LNTAs Using LUT Approach. 1-5 - Franklin Oliveira, Rogério Cassanta, Iago Storch, Luciano Agostini:
FastMIP-360: A Lightweight Decision Tree for Pruning VVC MIP in 360° Videos. 1-5 - César Azambuya, Mateo Guerrero, Gonzalo Hernández, German Fierro, Francisco Veirano:
Efficient Hardware Architecture for Artifact Cancellation in Closed-Loop Neurostimulators. 1-5 - Samuel Wachholz, Leonardo Gonçalves, Leonardo Antonietti, Morgana M. A. da Rosa, Sérgio J. M. de Almeida, Eduardo A. C. da Costa, Rafael Soares:
A Cross-Layer Single-Cycle Approximate Fixed-Point Square Root Unit. 1-5 - Rodrigo N. Wuerdig, Georges Gielen, Sergio Bampi:
Exploring Spatial Redundancy for Boosting the Performance of Stochastic Adcs in Deep Nanometer Cmos. 1-5 - Yuri Silva Vaz, Júlio C. B. de Mattos, Rafael Iankowski Soares:
FPGA Evaluation of Lightweight Cryptographic Algorithms: Efficiency and Security. 1-5 - Malak Bouaamri, Fadel Mohsen, Imadeddine Bendjeddou, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel:
A Comprehensive Review of State-of-the-Art Harmonic Rejection Techniques in N-Path Mixers. 1-5 - Ximing Fu, Yushi Zhou, Pierre Leduc, Kamal El-Sankary:
Process-Insensitive Pseudo-Resistor-Based Bandpass Filter with Wide and Linear Frequency Tuning for Biomedical Applications. 1-5 - Felipe Gerha Barbosa Otaviano da Silva, Matheus Guido de Oliveira, Marcos Henrique Mansano Vogel, Fábio Kawaoka Takase, Bruno L. S. Lima, Lucia Akemi Miyazato Saito:
Comparing MQTT and gRPC Protocols Performance in a IoT Smart Campus Cybersecurity Scenario. 1-5 - Luis Eduardo Mendes, Fabio Benevenuti, Antonio Carlos S. Beck, José Rodrigo Azambuja, Fernanda L. Kastensmidt:
Implementing a Dual RISC-V System-on-Chip Chiplet with Advanced Interface Bus. 1-5 - Gonzalo Carreño, Amelia E. Pizarro, Philip Vasquez-Iglesias, Cristobal E. Perez-Ramirez, Nicolás A. Reyes-Reyes, Axel Quinteros:
Ensemble Learning for the Prediction of Air Pollutants $\text{PM}_{2.5}$ and $\text{PM}_{10}$ During the Critical Episode Management Period in Talca, Chile. 1-5 - Francisco Júnior, Ricardo P. Jacobi, Ivan Saraiva Silva:
Energy-Efficient Mappings in the Athena CGRA. 1-5 - Henrique Seidel, Rodrigo Lopes, Rafael Soares, Morgana M. A. da Rosa, Eduardo A. C. da Costa:
Ultra-Low-Power Approximate Discrete Haar Wavelet Transform for Muscle Fatigue Detection in sEMG Signal. 1-5 - Ernesto Cristopher Villegas Castillo, Josie E. Rodriguez Condia, Juan-David Guerrero-Balaguera, Felipe Augusto da Silva, Michael Glaß:
A Predictive Framework for Fault Vulnerabilities in Edge Hardware Accelerators. 1-5 - Gilberto Kreisler, Luis Carlos Linares, Daniel Palomino, Bruno Zatt, Attilio Fiandrotti, Guilherme Corrêa:
Low-Complexity Spatio-Temporal Deformable Fusion for Compressed Video Quality Enhancement. 1-5 - Riyanka Banerjee, Jay Nangia, M. Santosh, Jai Gopal Pandey:
An Error-Resilient Area-Efficient Ultra-Low-Power 4-Bit Flash ADC Design with Multi-Vt Transistors. 1-5 - Mirella M. de O. Carneiro, Victor R. R. de Oliveira, Fernanda D. V. R. Oliveira, Fernando A. P. Barúqui, José Gabriel R. C. Gomes, Fabián Olivera, Milena F. Pinto:
Second Generation Current Conveyor Sizing Optimization Employing Genetic Algorithm with Simulator in the Loop. 1-5 - Karel Walter Gomez Orellana, Berthyn Rodrigo Tiñini Chuquimia, Juan Carlos Paredes Condori, Rodrigo Apaza Huanca, Esteban Gironda Lagrava, Hugo Orlando Condori Quispe:
Fuzzy-Integral Control for Adaptive Power Management in 25 GHz mmWave 5G Transceivers. 1-5 - Ronny Alberto Rueda Méndez, Juan Sebastián Caviedes Bernal, Johan Sebastián Eslava Garzón:
Strategies for Scaling Up RL-Based Multiplier Architectures to Higher Bit-Widths. 1-5 - Patrick Fath, Harald Pretl:
A 494-nW 32768-Hz DCXO-Based Clock Generator with 613 ps Jitter for Biomedical Signal Acquisition. 1-5 - Canisio Barth, Osamu Saotome, Aline de Oliveira:
Fractional Fourier Transform-Oriented Hardware Design for Normalized-Domain Chirp Synthesis. 1-5 - Julián Romero, Jeanpaull Valencia, Jeison Acevedo, Javier Ardila:
A 20 Gb/s Continuous Time Linear Equalizer with a Gain-Enhanced and Cross-Coupled Pair Technique for a SerDes Interface in 28 nm. 1-5 - Yuya Takahashi, Shunya Watanabe, Keito Yuasa, Atsushi Shirane:
An S-band VGA with Low Phase Variation Utilizing a Cross-Coupled Neutralization and LC resonance for Direct-to-Device Satellite Communication. 1-5 - David Freidenson Bejar, Mario Raffo-Jara, Ernesto Cristopher Villegas Castillo:
Validation of the NVDLA Architecture via AWS-Based FPGA Co-Simulation Using the Alexnet Model. 1-5 - Rodrigo Apaza Huanca, Renan Garcia Escarzo, Juan Carlos Paredes Condori, Esteban Gironda Lagrava, Karel Walter Gomez Orellana, Hugo Orlando Condori Quispe:
A Low-Cost, SDR-Based Testbed for Multi-Domain Characterization of 5G NR Amplifier Chains. 1-5 - Augusto Vassoler, Fakhrul Zaman Rokhani, Mateus Grellert:
Design and Synthesis of a Scaled Dot Product Accelerator with an AXI4-Stream Interface. 1-5 - Édney M. V. Freitas, Alexandre de Jesus Aragão, Bruno Sanches, Felipe W. da Costa, Andrés F. O. Hurtado, Wilhelmus A. M. Van Noije:
A Low-Cost Portable Stepped-Frequency Ultra-Wideband SDR-Based MWI System for Breast Cancer Detection. 1-5 - Francois Rivet, Mohamed Amine Hamoura, Sami Ouabrk, Nour Hello, Emilio Calvanese Strinati:
Joint Hardware-Waveform Co-Design of Semantic RF Transceivers for 6G Communications. 1-5 - Rafael Cardoso, Morgana M. A. da Rosa, Eduardo da Costa, Rafael Soares:
Design-Space Exploration of Approximate Adders in 5×5 Gaussian Filter Kernels. 1-5 - Rafaella Fiorelli, Matías R. Miguez, Juan Núñez:
Exploring Charge-Based Mosfet Compact Models with ACM-2 as a Design-Oriented Paradigm. 1-5 - Lucas Xavier, Daniel M. Muñoz:
HiLDA: High Level Design Application. 1-5 - Arshid Nisar, Lorena Anghel, Gregory di Pendina:
ATPG-Compliant Digital Modeling of MRAM for Cell-Aware Testing. 1-5 - Gabriel Maranhão, Deni Germano Alves Neto, Márcio Cherem Schneider:
Current-Controlled Pseudo-Resistor Aimed at the $\mathrm{T} \Omega$ Range. 1-5 - Mohsen Asghari, Sébastien Le Beux, Ron Mankarious:
Lightweight Yet Powerful: Optimized Tightly Coupled Hyperdimensional Computing Accelerators. 1-5 - Patrick Rosa, Daiane Freitas, Leonardo Müller, Guilherme Corrêa, Daniel Palomino:
Machine Learning-Driven Fast Full-Search Filter Decision in AV1 Fractional Inter-Frame Prediction. 1-5 - Deni Germano Alves Neto, Márcio Cherem Schneider, Manuel J. Barragan Asian, Sylvain Bourdel, Carlos Galup-Montoro:
Benchmarking the Symmetry of MOSFET Compact Models with Emphasis on ACM2. 1-5 - Léopold Van Brandt, Noémie Bidoul, Thomas Ratier, Xi Zeng, Jean-Charles Delvenne, Denis Flandre:
Experimental Demonstration of a Temperature-Sensitive VO2 Memristor-Based Spiking Circuit in Stochastic Bursting Regime. 1-5 - Hernan Mendez, Philip Vasquez-Iglesias, Julio Rodriguez, David Zabala-Blanco, Diego Martínez-Pereira, Cristobal E. Perez-Ramirez, Amelia E. Pizarro:
Cheetah Optimizer-Driven Hyperparameter Tuning of Multilayer Extreme Learning Machines for Heart Disease Detection. 1-5 - Diego Penaflor, Jimmy Tarrillo:
FPGA-Based File Level AES-Encryption System with Volatile Physical Key. 1-5 - Vicente K. Veiga, Fabio Benevenuti, Ulisses Maffazioli, Arthur F. Ely, Eduardo Marañon, Antonio Carlos S. Beck, José Rodrigo Azambuja, Fernanda L. Kastensmidt:
Power-Performance Analysis of a Softcore RISC-V SoC With CNN Accelerators for In-Orbit Computing. 1-5 - Dinesh Reddy Munnangi, Aaron Stillmaker:
Coarse-Grained vs. Fine-Grained Power Gating Techniques for RISC-V Processor. 1-5 - Enzo F. S. Costa, Claudenir R. A. Filho, Martim K. Presser, Renan D. P. de Oliveira, César Augusto Prior, Leonardo L. de Oliveira, João Baptista dos Santos Martins:
Logic Synthesis and Characterization of a 22 nm Reconfigurable CIC Decimation Filter. 1-5 - Shunya Watanabe, Yuya Takahashi, Keito Yuasa, Atsushi Shirane:
An S-Band High-Resolution Vector-Sum Phase Shifter for Direct-to-Device Satellite Communication. 1-5 - Arthur Cruz Morbach, Sandro Binsfeld Ferreira, Filipe D. Baumgratz, Robert Bogdan Staszewski:
Suitability Analysis of Mixer-First Discrete-Time RF Receivers. 1-5 - Ramon Ulises Almada Prieto, José-Cruz Nuñez Pérez, Alán Rodrigo Díaz Rizo:
Chaos-Based Hardware Trojan Covert Channel for Synchronized Chaotic Cryptosystems. 1-5 - Matheus Lemos, Clayton R. Farias, Paulo F. Butzen, José Rodrigo Azambuja:
RISC-V Area-Optimized ASIC Design with a Multi-Height 7nm FinFET Standard Cell Library. 1-5 - Jhordan Pila, Edgar Haro, Alberto Sánchez, Marcelo Pozo:
Development of a HIL-Real Time Simulator for Single-Phase Line-Commutated AC-DC Converters. 1-5 - Catalin Andrei Dobrin, Deni Germano Alves Neto, D. Gaidioz, Philippe Cathelin, Sylvain Bourdel, Manuel J. Barragán:
RF Design-Oriented ACM Model Generation Using Parametric Test and Machine Learning Regression in 28nm FD-SOI CMOS Technology. 1-5 - Julián Evia, German Fierro, Fernando Silveira:
Low Noise Current Sources for Closed Loop Neurostimulation. 1-5 - Luis Peña Treviño, Eric Guerra Ribeiro, Lirida Naviner, Fady Abouzeid, Philippe Roche:
Exploiting Timing-Power Causality for Post-Route Metric Prediction via Hierarchical Learning. 1-5 - Francisca Donoso, Nelson Salvador, Christian A. Rojas, Jorge Marin, Gonzalo Carvajal:
Design of a PI-Controller ASIC for a Multilevel Converter Using High-Level Synthesis and LibreLane. 1-5 - Cristiane Barbosa Prado, Tiago Rodrigo Cruz, Max Feldman, Dylan Mielke Timm, Ivan Müller:
Virtualization of Wireless Industrial Networks. 1-5 - Thuy T. Pham, Dang-Kièn Germain Pham, Reda Mohellebi, Pierre Almairac, Carolina Pedrosa, Patricia Desgreys:
A Bandwidth-Aware Figure of Merit for Behavioral Modeling of Power Amplifiers. 1-5 - Amelia E. Pizarro, Cristobal E. Perez-Ramirez, Philip Vasquez-Iglesias:
On the Effects of Numeric Precision in a Modified Starfish Optimization Algorithm. 1-5 - Diego M. de Mattos, Paulo César Comassetto de Aguirre, Lucas C. Severo, Alessandro Gonçalves Girardi:
Low-Power CMOS DC-DC Converter for Artificial Light Energy Harvesting. 1-5 - Nicolas Gabriel Cotti, Lucas Liaño, Felix Palumbo, Andres Kasulin, Juan P. Goyret, Mariano Garcia Inza:
Polysilicon Heater Control for Fast and Stable Temperature-Dependent Measurements. 1-5 - Massimo Bruschi, Jose Fuentes, Diego Garcia, Juan Rodríguez, Carlos Silva-Cardenas, Manuel Monge:
Towards an Open-Source Wireless Power and Data Transfer Library for Implantable and Wearable Medical Devices. 1-5 - Anthony Leiva-Valverde, Fabricio Elizondo-Fernández, Luis G. León-Vega, Cristina Meinhardt, Jorge Castro-Godínez:
A Quantitative Evaluation of Approximate Softmax Functions for Deep Neural Networks. 1-5 - Thorben Schey, Khaled Karoonlatifi, Michael Weyrich, Andrey Morozov:
Efficient Noise Injection Methodology for Sample and Hold Circuits in AMS Behavioral Models. 1-5 - Victor Ramon F. B. De Souza, Lucas Bernardino Cardoso, Angelo Perkusich, Gutemberg G. dos Santos Júnior:
Electrocardiogram Synthesis from Photoplethysmogram Signals Through Generative Adversarial Networks. 1-5
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last updated on 2026-04-27 01:23 CEST by the dblp team
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