"Sequential Dual-Loop Digital and Analog PLL Synthesizer for Fast-Locking ..."

Virgile Colrat et al. (2026)

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DOI: 10.1109/LASCAS67804.2026.11457111

access: closed

type: Conference or Workshop Paper

metadata version: 2026-04-10

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Virgile Colrat, David Gaidioz, Andres Asprilla, Frédéric Paillardet, Andreia Cathelin, Yann Deval:
Sequential Dual-Loop Digital and Analog PLL Synthesizer for Fast-Locking IoT Applications in 18nm FD-SOI CMOS. LASCAS 2026: 1-4

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