"Test generation for circuits described in procedural hardware description ..."

Krzysztof Sapiecha, T. Czichon (1986)

> Home

Details and statistics

DOI: 10.1016/0165-6074(86)90067-0

access: closed

type: Journal Article

metadata version: 2026-06-09

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jsa/SapiechaC86
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jsa/SapiechaC86
Krzysztof Sapiecha, T. Czichon:
Test generation for circuits described in procedural hardware description languages (HDLs). Microprocessing and Microprogramming 18(1-5): 371-379 (1986)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.