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ORCIDMicroprocessing and Microprogramming, Volume 18
Volume 18, Numbers 1-5, 1986
Microarchitectures, Developments and Applications, Venice, Italy, September 15-18, 1986
- Session coordinators. viii
- Editorial Board. I
- Session chairmen. ix
- Reviewers. viii-ix
- Introduction to the programme. vii
- Mariagiovanna Sami:
Introduction. 1 - Ulrich Trottenberg:
Suprenum - A MIMD multiprocessor system for large scale scientific computing. 3 - John Mølgaard:
Session K2: Keynote session. 9 - Edward J. McCluskey:
Comparing causes of system failure. 11-22 - Semiconductor industry in Europe vs. Japan and United States. 23
Simulation
- Winfried Hahn:
Event-flow computation as key to fast digital design simulation. 27-38 - Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
:
C TPDL∗: Adapting TPDL∗ to concurrent simulation environments. 39-45 - Giacomo Cioffi, Paolo Libri, Alfredo Micarelli:
A gate level simulator for MS-DOS personal computers. 47-51
Embedded systems
- Knud Smed Christensen:
A Pascal-like portable, interactive development system for small microcontrollers. 55-58 - Petri Pulli:
Embedded microcontroller operating system with state-machine support. 59-62 - Kari Leppälä:
Interpretive execution of program code increases software robustness in embedded computer systems. 63-68
Microprocessor applications in artificial intelligence
- Brigitte Knödler, Wolfgang Rosenstiel:
A PROLOG preprocessor for Warren's abstract instruction set. 71-79 - Werner Eicher, Ewald von Puttkamer:
A new strategy for interpreting LISP. 81-88 - Rudolph E. Seviora, Paul P. Dasiewicz:
A blackboard-based robot position estimator. 89-95 - Helmut Painke:
Section B1: Silicon Compilation. 97 - Reiner W. Hartenstein, Karin Lemmert:
A CAD tool box for VLSI around a hardware description language. 99-105 - Martin Hulin:
An expert system for mapping computer architectures into semicustom integrated circuits. 107-122 - Zainalabedin Navabi, Kia Doroudi:
Compiling an RT level hardware description language into layout of NMOS cells. 123-129 - Karl J. Lieberherr:
A two-dimensional hardware design language for VLSI. 131-141
Local area networks
- Imrich Chlamtac:
A concurrent network simulator for automated protocol development and performance evaluation. 145-152 - Harald Bender, Peter Hartlmüller, Helmut Rzehak:
A local area network with dynamic switch-over between a CSMA/CD and a token-passing access protocol. 153-159 - H. Jyllilä, T. Lehtinen, S. Nikkilä:
Virtual token access method and its implementations. 161-171 - M. Dang, M. Diaz-Nava, G. Michel:
Design of a VLSI communicating circuit for an industrial local network in control process and automated production. 173-181
Multimicroprocessors
- Ferenc Vajda:
Concurrent systems, programming primitives and languages: A comparative study. 185-194 - Rainer Klar, Norbert Luttenberger:
VLSI-based monitoring of the inter-process-communication in multi-microcomputer systems with shared memory. 195-204 - Ghulam M. Chaudhry, Jatinder Singh Bedi:
Cache interleaving in multiprocessor systems. 205-212 - Eddy H. Debaere, Jan M. Van Campenhout:
A shared-memory modula-2 multiprocessor for real-time control applications. 213-220
Software engineering environments
- Peter Lempp:
Integrated computer support in the software engineering environment EPOS - Possibilities of support in system development projects. 223-232 - I. W. Morrison, Alan Burns:
The design and prototype implementation of a "structure attribute" model for tool interfacing within an IPSE. 233-240 - Franz J. Rammig:
High level systems: Simulation, specification and synthesis. 241 - G. V. Collis, Martyn D. Edwards:
Automatic hardware synthesis from a behavioural description language: occam. 243-250 - Peter Marwedel:
An algorithm for the synthesis of processor structures from behavioural specifications. 251-262 - R. Sridhar, Mark L. Manwaring:
An automatic microcode generator for high level language machines. 263-268
Fault tolerance
- Fabrizio Lombardi:
Diagnosis by comparison with faulty comparators. 271-274 - Anna Antola, Roberto M. Negrini, Nello Scarabottolo:
An approach to fault-tolerance in architectures for discrete fourier transforms. 275-288 - J. P. C. van Gennip:
Interfacing VME-bus to a fault-tolerant architecture in the industrial environment. 289-295 - Helmut Kerner, Helmut Rainel:
EDDA, a language based on petrinets and the dataflow principle for the development of parallel programs. 299-305 - D. Janssens:
Message passing and graph transformations: A model of actor computation. 307-318 - Giovanni Cantone, Aniello Cimitile, Paolo Maresca:
A new methodological proposal for program maintenance. 319-331 - Zebo Peng, Krzysztof Kuchcinski:
Synthesis of control structures from Petri net descriptions. 335-340 - Lambert Spaanenburg, André Broekema, Jens Leenstra, C. Huys:
VLSI top-down design based on the separation of hierarchies. 341-346 - Wolfgang Rosenstiel:
Optimizations in high level synthesis. 347-352
Test generation
- Alaa Mohseni Behbahani, Frederick J. Hill, Mayank R. Patel:
Intelligence driven test sequence generator for VLSI design. 355-362 - Fausto Distante, L. Galvani, A. Maderna, M. Minotti, Vincenzo Piuri:
BAT: Optimization algorithms and overall design of a behavioral automatic tester. 363-370 - Krzysztof Sapiecha, T. Czichon:
Test generation for circuits described in procedural hardware description languages (HDLs). 371-379
Development tools
- Thomas Bemmerl:
Realtime high level debugging in host/target environments. 387-400 - Beatrice Lazzerini, Cosimo Antonio Prete:
DISDEB: An interactive high-level debugging system for a multi-microprocessor system. 401-408 - Francesco Gregoretti, Franco Maddaleno, Maurizio Zamboni:
Monitoring tools for multiprocessors. 409-416 - S. Das Gupta, C. Hwa Chang:
A pre-design tool for a class of parallel processing systems. 417-424 - Michael Ansorge, Christian Piguet, Evert Dijkstra:
Design methodology for low-power full custom RISC microprocessors. 427-434 - Silvano Gai, Antonio Lioy, Fabio Neri:
VLSI implementation of linear feedback shift registers for microprocessor applications. 435-440 - Rainer Clemen, E. Eisenbraun, Walter Fischer, Werner Haug, Klaus Helwig, Wolf Dieter Loehlein, H. Lindner, M. Tong:
Fast and dense embedded arrays for microprocessors in CMOS-technology. 441-444 - Patrice Frison, Eric Gautrin:
The MADMACS layout system. 445-452 - Ferenc Vajda:
Distributed systems. 453-454 - Hubert J. M. Decuypere:
Object oriented system supporting dynamic configuration. 455-462 - Andreas S. Pombortsis, Panagiotis Linardis, Constantin Halatsis:
Study of a class of conflict resolution strategies for synchronous multiprocessor interconnection networks. 463-467 - Marco Ajmone Marsan, Pietro Camarda, Fabio Neri:
Multichannel protocols for real-time microcomputer networks. 469-477 - Yuliang Wan, Yanzhen Qu:
Research and design of communication subnet for supporting distributed systems. 479-487 - Lutz Richter:
F1: Data store organisation. 489 - Gilbert E. Houtekamer, A. A. Vlasblom, A. J. Breimer:
A model of the I/O subsystem of the Philips P4500 minicomputer. 491-497 - Krzysztof Goczyla:
Disk space allocation schemes for real-time data gathering applications. 499-504 - Horst Langendörfer, Ralf Cordes, Rüdiger Buck-Emden:
Multimedia filing & retrieval based on optical and magnetic mass-storage technologies. 505-512 - Malcolm Taylor:
Specialized architectures. 513-514 - Massimo Annunziata, Paolo Guazzoni, Lorenzo Lisca, Giacomo R. Sechi, Luisa Zetta:
AMDAS - An advanced microprogrammed data acquisition system: A first evaluation prototype. 515-524 - J. Vorstermans, L. Van den Eede:
An image processor for a multi image processing system. 525-538 - Mamoru Maekawa:
Multiwindow screens without window overlapping. 539-546
Hardware description languages
- Hans Eveking:
SMAX - A CONLAN member language for verifiable hardware descriptions. 549-558 - Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto:
An extension to base CONLAN in the temporal domain. 559-566 - Gunnar Carlstedt:
A language for behavior, structure and geometry. 567-580 - Holger Sedlak, Ulrich Golze:
An RSA cryptography processor. 583-590 - Paul P. Dasiewicz, P. F. Corbett, Rudolph E. Seviora:
A VLSI architecture for the Central Processor of a digital switch. 591-595 - Stephen C. Winter:
On the physical interconnection of the CTD multiprocessor. 597-601
Software engineering tools
- Roberto Lecciso, Stefano Mainetti, Sandro Morasca:
Software metrics: A critical evaluation and an application to Pascal. 605-615 - Paolo Ercoli:
Quantitative evaluation and selection criteria for implementation of decision tables. 617-621 - José A. Pino:
Information retrieval using microcomputers. 623-628 - Jorma Kivelä, Hannu Heusala, Timo Juntunen, Jukka Lahti, Juha-Pekka Soininen, Seppo J. Säynäjäkangas:
The dependency notation as a graphical description language for logic design and silicon compilation. 631-635 - Tony Larsson:
Semantics of a hardware specification language. 637-643
Industrial automation
- Theodor Tempelmeier:
Microprocessors in factory automation - A case study of an automated guided vehicle system and its integration into a hierarchical control structure. 647-656 - Wolfgang A. Halang:
A precisely timed fully parallel process input/output facility for control applications. 657-664
Systems performance
- M. Gruszecki, P. van Esbroeck:
Capacity and performance prediction in large distributed microprocessor systems under increasing processing speed. 667-674 - Gerard L. Reijns, Cees J. van Spronsen, W. Rombaut, R. van de Burg:
Workload generator for the performance analysis of some Philips minicomputers. 675-681
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