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ORCIDXueming Li 0001
Person information
- affiliation: Guangdong University of Technology, School of Integrated Circuits, School of Automation, Guangzhou, China
Other persons with the same name
- Xueming Li — disambiguation page
- Xueming Li 0002
![[0000-0003-1058-2799]](https://devdomain4test.ir/img/orcid-mark.12x12.png "0000-0003-1058-2799")
— Beijing University of Posts and Telecommunications (BUPT), School of Digital Media and Design Arts, China (and 3 more) - Xueming Li 0003 — Hunan University, College of Mechanical and Vehicle Engineering, Changsha, China (and 1 more)
- Xueming Li 0004 — Tsinghua University, School of Life Sciences, China
- Xueming Li 0005 — Liaoning Normal University, Human Settlements Research Center, Liaoning Key Laboratory of Physical Geography and Geomatics, Dalian, China (and 1 more)
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2020 – today
- 2026
[j14]Xueming Li, Jinhui Pan, Hongmin Huang, Yuanmiao Lin, Xianghong Hu, Shuting Cai, Xiaoming Xiong:
An efficient DSP packing framework for FPGA-based mixed-precision DCNN processor. J. Syst. Archit. 171: 103627 (2026)- [j13]Yuanmiao Lin, Peng Zhang, Zijian Zhang, Xueming Li, Hongmin Huang, Ruidian Zhan, Xianghong Hu, Shuting Cai, Xiaoming Xiong:
Efficient FPGA Acceleration for 4-bit CNNs via Quantization-Induced Structured Sparsity and LUT-Based Multiplication. IEEE Trans. Very Large Scale Integr. Syst. 34(5): 1677-1681 (2026) - 2025
- [j12]Yuanmiao Lin, Shansen Fu, Xueming Li, Chaoming Yang, Rongfeng Li, Hongmin Huang, Xianghong Hu, Shuting Cai, Xiaoming Xiong:
A DSP-Based Precision-Scalable MAC With Hybrid Dataflow for Arbitrary-Basis-Quantization CNN Accelerator. IEEE Comput. Archit. Lett. 24(1): 65-68 (2025) - [j11]Xianghong Hu, Yuanmiao Lin, Xueming Li, Ruidian Zhan, Jie Cao, Dayong Zhu, Shuting Cai, Xin Zheng, Xiaoming Xiong:
A Multiple-Aspect Optimal CNN Accelerator in Top1 Accuracy, Performance, and Power Efficiency. IEEE Comput. Archit. Lett. 24(2): 349-352 (2025) - [j10]Rongfeng Li, Xueming Li, Chaoming Yang, Xianghong Hu, Yuanmiao Lin, Shansen Fu, Hongmin Huang, Shuting Cai, Xiaoming Xiong:
A precision-scalable sparse CNN accelerator with fine-grained mixed bitwidth configurability. IEICE Electron. Express 22(7): 20240601 (2025) - [j9]Xianghong Hu, Jinhui Pan, Yue Ding, Wenji Huang, Zhejun Zheng, Xueming Li, Hongmin Huang, Xiaoming Xiong:
A High-Efficiency CNN Accelerator With Mixed Low-Precision Quantization. IET Circuits Devices Syst. 2025 (2025) - [j8]Xianghong Hu, Shansen Fu, Yuanmiao Lin, Xueming Li, Chaoming Yang, Rongfeng Li, Hongmin Huang, Shuting Cai, Xiaoming Xiong:
An FPGA-based bit-level weight sparsity and mixed-bit accelerator for neural networks. J. Syst. Archit. 166: 103463 (2025) - [j7]Yuanmiao Lin, Zhaozhang Feng, Xueming Li, Hongmin Huang, Ruidian Zhan, Xianghong Hu, Shuting Cai, Xiaoming Xiong:
An FPGA Accelerator With Efficient Weight Compression by Combining Bit-Level Sparsity and Mixed-Precision Quantization. IEEE Trans. Circuits Syst. II Express Briefs 72(11): 1595-1599 (2025) - [j6]Xianghong Hu, Chaoming Yang, Xueming Li, Rongfeng Li, Yuanmiao Lin, Shansen Fu, Hongmin Huang, Shuting Cai, Xiaoming Xiong:
A Precision-Scalable Accelerator with Sign-Magnitude Representation and Dual Adder Trees. ACM Trans. Embed. Comput. Syst. 24(6): 160:1-160:26 (2025) - 2023
- [j5]Xianghong Hu, Hongmin Huang, Xueming Li, Xin Zheng, Qinyuan Ren, Jingyu He, Xiaoming Xiong:
High-performance Reconfigurable DNN Accelerator on a Bandwidth-limited Embedded System. ACM Trans. Embed. Comput. Syst. 22(6): 90:1-90:20 (2023) - 2022
- [j4]Hongmin Huang, Xianghong Hu, Xueming Li, Xiaoming Xiong:
An efficient loop tiling framework for convolutional neural network inference accelerators. IET Circuits Devices Syst. 16(1): 116-123 (2022) - [j3]Xianghong Hu, Xueming Li, Xin Zheng, Yuan Liu, Xiaoming Xiong:
A high speed processor for elliptic curve cryptography over NIST prime field. IET Circuits Devices Syst. 16(4): 350-359 (2022) - [j2]Xueming Li, Hongmin Huang, Taosheng Chen, Huaien Gao, Xianghong Hu, Xiaoming Xiong:
A hardware-efficient computing engine for FPGA-based deep convolutional neural network accelerator. Microelectron. J. 128: 105547 (2022) - [j1]Xianghong Hu, Xueming Li, Hongmin Huang, Xin Zheng, Xiaoming Xiong:
TiNNA: A Tiny Accelerator for Neural Networks With Efficient DSP Optimization. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2301-2305 (2022) - [c1]Hongmin Huang, Xueming Li, Yadong Qin, Xianghong Hu, Xiaoming Xiong:
An Efficient Parallel Architecture for Convolutional Neural Networks Accelerator on FPGAs. HP3C 2022: 66-71
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