default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDXingsheng Wang
Person information
- affiliation: Huazhong University of Science and Technology, School of Optical and Electronic Information, Wuhan, China
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
2020 – today
- 2026
[j9]Xiuli Diao, Xingsheng Wang, Qingtian Zeng
, Zhengguo Song:
Multi-head self-attention based personalized exercise recommendation with time demand. Appl. Soft Comput. 201: 115741 (2026)- [j8]Buqing Cai, Xingsheng Wang, Zhuo Jia, Fa Zhang, Bin Hu, Xiaohua Wan:
DyMamba: dynamic Mamba for microscopy image semantic segmentation. Bioinform. 42(6) (2026) - [c17]Yilong Fang, Pinfeng Jiang, Letian Wang, Yi Wang, Mingde Zhu, Xiangshui Miao, Xingsheng Wang:
SPEAR: Spike-Aware Point Pruning and Fused FPS-KNN Sampling for Spiking Point Transformer Acceleration Co-Design. ISCAS 2026: 4593-4597 - 2025
- [j7]Pinfeng Jiang, Danzhe Song, Menghua Huang, Fan Yang, Letian Wang, Pan Liu, Xiangshui Miao, Xingsheng Wang:
Optimizing hardware-software co-design based on non-ideality in memristor crossbars for in-memory computing. Sci. China Inf. Sci. 68(2) (2025) - [j6]Fan Yang, Nan Li, Letian Wang, Pinfeng Jiang, Xiangshui Miao, Xingsheng Wang:
ISARA: An Island-Style Systolic Array Reconfigurable Accelerator Based on Memristors for Deep Neural Networks. IEEE Trans. Very Large Scale Integr. Syst. 33(4): 963-975 (2025) - [c16]Pinfeng Jiang, Letian Wang, Yilong Fang, Yi Wang, Mingde Zhu, Xiangshui Miao, Xingsheng Wang:
SPARTA: Spike-Aware Token Skipping Co-Optimization with Heterogeneous ReRAM-CIM Architecture for Spiking Transformer Acceleration. ICCAD 2025: 1-9 - [c15]Dejiang Mu, Pan Liu, Zijian Zhou, Zifei Cai, Jian Zhang, Kanhao Xue, Zhigang Ji, Xiangshui Miao, Xingsheng Wang:
Multi-Level RTN with Certain Regularities in Oxide-RRAM: Experiments, Defect Dynamics and 3D Multi-Physics Modeling. IRPS 2025: 1-6 - [c14]Zhouchao Gan, Yifeng Xiong, Fan Yang, Mengjie Li, Xiangshui Miao, Xingsheng Wang:
A Novel Memristor-Based Majority Logic and Efficient Approximate Full Adder for Image Processing. ISCAS 2025: 1-5 - [c13]Pinfeng Jiang, Letian Wang, Yilong Fang, Yi Wang, Mingde Zhu, Xiangshui Miao, Xingsheng Wang:
ReBA: A Hybrid Sparse Reconfigurable Butterfly Accelerator for Solving Partial Differential Equations via Hardware and Algorithm Co-Design. ISCAS 2025: 1-5 - 2024
- [j5]Zhouchao Gan, Dongdong Zhang, Chenyu Zhang, Yinghao Ma, Xiangshui Miao, Xingsheng Wang:
Efficient implementation of majority-inverter graph logic and arithmetic functions with memristor arrays. Sci. China Inf. Sci. 67(7) (2024) - [c12]Zifei Cai, Anaoxue Huang, Yifeng Xiong, Dejiang Mu, Xiangshui Miao, Xingsheng Wang:
Multi-order Differential Neural Network for TCAD Simulation of the Semiconductor Devices. DAC 2024: 198:1-198:6 - [c11]Fan Yang, Nan Li, Juncheng Huang, Qingjie Wang, Xiangshui Miao, Xingsheng Wang:
Design Technology Co-Optimization for Memristor Self-Write Termination Circuits. ICTA 2024: 45-46 - [i2]Zhiliang Peng, Yicheng Wang, Zhengwu Yuan, Xingsheng Wang:
iPREFER: An Intelligent Parameter Extractor based on Features for BSIM-CMG Models. CoRR abs/2404.07827 (2024) - 2023
- [j4]Haowen Luo, Ruihan Li, Xiangshui Miao, Xingsheng Wang:
A comprehensive study of device variability of sub-5 nm nanosheet transistors and interplay with quantum confinement variation. Sci. China Inf. Sci. 66(2) (2023) - [j3]Chengxu Wang, Hao Yu, Yichen Wang, Zichong Zhang, Xiangshui Miao, Xingsheng Wang:
Modeling and physical mechanism analysis of the effect of a polycrystalline-ferroelectric gate on FE-FinFETs. Sci. China Inf. Sci. 66(5) (2023) - [c10]Zhouchao Gan, Dongdong Zhang, Yinghao Ma, Chenyu Zhang, Xiangshui Miao, Xingsheng Wang:
Invited Paper: A Memristor-Based Stateful Majority-Inverter Graph Logic and 1-Bit Full Adder for In-Memory Computing Systems. ICTA 2023: 95-98 - 2020
- [c9]Hao Yu, Chengxu Wang, Xiangshui Miao, Xingsheng Wang:
A TCAD-based Study of NDR Effect in NC-FinFET. ICTA 2020: 102-103 - [c8]Chengxu Wang, Hao Yu, Xiangshui Miao, Xingsheng Wang:
Electrostatic Characteristics Analysis of Ferroelectric Tunneling Junctions with Different Structures. ICTA 2020: 112-113
2010 – 2019
- 2019
- [i1]Qiang Huo, Zhenhua Wu, Weixing Huang, Xingsheng Wang, Geyu Tang, Jiaxin Yao, Yongpan Liu, Feng Zhang, Ling Li, Ming Liu:
A Novel General Compact Model Approach for 7nm Technology Node Circuit Optimization from Device Perspective and Beyond. CoRR abs/1905.11207 (2019) - 2016
- [c7]A. Asenov, Yangang Wang, Binjie Cheng, Xingsheng Wang, Plamen Asenov, Talib Al-Ameri, Vihar P. Georgiev:
Nanowire transistor solutions for 5nm and beyond. ISQED 2016: 269-274 - 2014
- [c6]Xingsheng Wang, Binjie Cheng, Andrew R. Brown, Campbell Millar, Asen Asenov:
Accurate simulations of the interplay between process and statistical variability for nanoscale FinFET-based SRAM cell stability. ESSDERC 2014: 349-352 - 2013
- [j2]Xingsheng Wang, Binjie Cheng, Jente B. Kuang, Andrew R. Brown, Campbell Millar, Asen Asenov:
Statistical Variability and Reliability and the Impact on Corresponding 6T-SRAM Cell Design for a 14-nm Node SOI FinFET Technology. IEEE Des. Test 30(6): 18-28 (2013) - [c5]Xingsheng Wang, Binjie Cheng, Andrew R. Brown, Campbell Millar, Jente B. Kuang, Sani R. Nassif, Asen Asenov:
Impact of statistical variability and charge trapping on 14 nm SOI FinFET SRAM cell stability. ESSDERC 2013: 234-237 - [c4]Binjie Cheng, Xingsheng Wang, Andrew R. Brown, Jente B. Kuang, Dave Reid, Campbell Millar, Sani R. Nassif, Asen Asenov:
SRAM device and cell co-design considerations in a 14nm SOI FinFET technology. ISCAS 2013: 2339-2342 - 2012
- [c3]Xingsheng Wang, Binjie Cheng, Andrew R. Brown, Campbell Millar, Asen Asenov:
Statistical variability in 14-nm node SOI FinFETs and its impact on corresponding 6T-SRAM cell design. ESSDERC 2012: 113-116 - 2011
- [c2]Nivard Aymerich, A. Asenov, Andrew R. Brown, Ramon Canal, Binjie Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, Elena I. Vatajelu, Xavier Vera, Xingsheng Wang, Paul Zuber:
New reliability mechanisms in memory design for sub-22nm technologies. IOLTS 2011: 111-114 - 2010
- [j1]Binjie Cheng, Daryoosh Dideban, Negin Moezi, Campbell Millar, Gareth Roy, Xingsheng Wang, Scott Roy, Asen Asenov:
Statistical-Variability Compact-Modeling Strategies for BSIM4 and PSP. IEEE Des. Test Comput. 27(2): 26-35 (2010) - [c1]Binjie Cheng, Daryoosh Dideban, Negin Moezi, Campbell Millar, Gareth Roy, Xingsheng Wang, Scott Roy, Asen Asenov:
Capturing intrinsic parameter fluctuations using the PSP compact model. DATE 2010: 650-653
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2026-07-16 00:47 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated, funded, and maintained by:
Schloss Dagstuhl - Leibniz Center for Informatics is a member of the Leibniz Association and is funded by the federal government of Germany and the states of Germany, especially Saarland and Rhineland‑Palatinate.
