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ORCIDERSA 2009: Las Vegas, Nevada, USA
- Toomas P. Plaks:
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2009, July 13-16, 2009, Las Vegas Nevada, USA. CSREA Press 2009, ISBN 1-60132-101-5
WORLDCOMP Keynote Speeches - ERSA
- Viktor K. Prasanna:
Algorithm Design for Reconfigurable Computing Systems. ERSA 2009: 3 - Jose L. Muñoz:
It's Like Deja-Vu All over Again ... Again. ERSA 2009: 4 - Rahul Razdan:
Future Directions in Reconfigurable Computing. ERSA 2009: 5
ERSA Invited Talks
- Christophe Jégo:
FPGA Prototyping Approach for the Validation of Efficient Iterative Decoders in Digital Communication Systems. ERSA 2009: 9-18 - Hideharu Amano:
Japanese Dynamically Reconfigurable Processors. ERSA 2009: 19-28 - Christophe Wolinski, Krzysztof Kuchcinski, Kevin J. M. Martin, Erwan Raffin, François Charot:
How Constrains Programming Can Help You in the Generation of Optimized Application Specific Reconfigurable Processor Extensions. ERSA 2009: 29-42
Invited Panel Session; Adaptive / Evolvable Reconfigurable Computing Systems
- Gilles Sassatelli:
Bio-inspired Systems: Self-adaptability from Chips to Sensor-network Architectures. ERSA 2009: 45-54 - Jürgen Becker:
Adaptive Multicore Systems-on-Chip (MSoC) - Design and Computing in the Nano Era. ERSA 2009: 55-66 - Pierre-André Mudry, Gianluca Tempesti:
A Design Environment for Bio-Inspired Cellular Architectures. ERSA 2009: 67-80 - Jean-Philippe Diguet, Linfeng Ye, Yvan Eustache, Jérémie Crenne, Pierre Bomel, Guy Gogniat, Jorgiano Vidal, Florent de Lamotte:
Networked Self-adaptive Systems: An Opportunity for Configuring in the Large. ERSA 2009: 81-90 - Luigi Carro, Monica Magalhães Pereira:
Adaptive Processing Architectures for the Ultimate Scaling of the CMOS World. ERSA 2009: 91-97
Industrial Demo
- Peter Athanas:
Element CXI: Exploring Element Computing in Academia. ERSA 2009: 101
Adaptive and Dynamically Reconfigurable Systems
- Abderrahmane Bennis, Miriam Leeser, Gilead Tadmor:
The Effect of Parameterization on a Reconfigurable Implementation of PIV. ERSA 2009: 105-111 - Toru Sano, Yoshiki Saito, Hideharu Amano:
Configuration with Self-Configured Datapath: A High Speed Configuration Method for Dynamically Reconfigurable Processors. ERSA 2009: 112-118 - Madhura Purnaprajna, Christopher Pohl, Mario Porrmann, Ulrich Rückert:
Using Run-time Reconfiguration for Energy Savings in Parallel Data Processing. ERSA 2009: 119-125 - Philip Top, Maya B. Gokhale:
Application Experiments: MPPA and FPGA. ERSA 2009: 126-135 - Ying Li, Bridget Benson, Ryan Kastner, Xing Zhang:
Bit Error Rate, Power and Area Analysis of Multiple FPGA Implementations of Underwater FSK. ERSA 2009: 136-142
Multi-Context Devices and Applications
- Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama:
An Asynchronous Field-Programmable VLSI Using LEDR/4-Phase-Dual-Rail Protocol Converters. ERSA 2009: 145-150 - Yosuke Kawanaka, Shin'ichi Wakabayashi, Shinobu Nagayama:
A Systolic String Matching Algorithm for High-Speed Recognition of a Restricted Regular Set. ERSA 2009: 151-157 - Pranav S. Vaidya, Jaehwan John Lee:
A Novel Multicontext Coarse-Grained Join Accelerator for Column-Oriented Databases. ERSA 2009: 158-164
Reconfigurable System Design Tools and Languages
- Kenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, Gerard J. M. Smit:
Towards Effective Modeling and Programming Multi-core Tiled Reconfigurable Architectures. ERSA 2009: 167-173 - Paolo Roberto Grassi, Marco D. Santambrogio, Jens Hagemeyer, Christopher Pohl, Mario Porrmann:
SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems. ERSA 2009: 174-180 - Fernando Rincón, Julio Dondo, Jesús Barba, Francisco Moya, Juan Carlos López:
Supporting Operating Systems for Reconfigurable Computing: A Distributed Service Oriented Approach. ERSA 2009: 181-187 - Luke Terry, Vladimir Roitch, Shoeb Tufail, Kirit Singh, Omair Taraq, Wayne Luk, Peter Jamieson:
Harnessing Human Computation Cycles for the FPGA Placement Problem. ERSA 2009: 188-194 - Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit:
Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor. ERSA 2009: 195-201
Applications of Reconfigurable Systems
- Ray Bittner:
The Speedy DDR2 Controller For FPGAs. ERSA 2009: 205-211 - Austin Rogers, Aleksandar Milenkovic:
An Implementation of Security Extensions for Data Integrity and Confidentiality in Soft-Core Processors. ERSA 2009: 212-218 - Sumedha Gupta Kodipyaka, Jooheung Lee:
A Scalable H.264/AVC Variable Block Size Motion Estimation Engine Using Partial Reconfiguration. ERSA 2009: 219-225 - Zahir Larabi, Yves Mathieu, Stéphane Mancini:
High Efficiency Reconfigurable Cache for Image Processing. ERSA 2009: 226-232 - Akira Yamawaki, Seiichi Serikawa, Masahiko Iwane:
An Efficient Comparative Evaluation to Buffering Methods for Window-based Image Processing Using Semi-programmable Hardware. ERSA 2009: 233-239 - Andrea Abba, Antonio Manenti, Andrea Suardi, Angelo Geraci, Giancarlo Ripamonti:
Implementation of the Gauss-Newton Algorithm for Non-linear Least-mean-squares Fitting in FPGA Devices. ERSA 2009: 240-246 - Andrea Suardi, Antonio Manenti, Andrea Abba, Angelo Geraci:
High-efficiency FPGA Fully-Based Implementation of the Conjugate Gradient Method. ERSA 2009: 247-253 - Hassan Edrees, Brian Cheung, McCullen Sandora, David B. Nummey, Deian Stefan:
Hardware-Optimized Ziggurat Algorithm for High-Speed Gaussian Random Number Generators. ERSA 2009: 254-260
Short Papers
- Masanori Hariyama, Keita Tanji, Michitaka Kameyama:
FPGA Implementation of a High-Speed Stereo Matching Processor Based on Recursive Computation. ERSA 2009: 263-266 - Guolei Zhu, Heng Yu, Yajun Ha, Yingmin Wang:
A Multi-Application Mapping Framework for Network-on-Chip Based MPSoC: An FPGA Implementation Case Study. ERSA 2009: 267-270 - Shota Ishihara, Noriaki Idobata, Masanori Hariyama, Michitaka Kameyama:
A Fine-Grain SIMD Architecture Based on Flexible Ferroelectric-Capacitor Logic. ERSA 2009: 271-274 - Kylan Robinson, José G. Delgado-Frias:
Fault Avoidance in Medium-Grain Reconfigurable Hardware Architectures. ERSA 2009: 275-278 - Guojun Dai, Peng Liu, Y. Fun Hu, Geyong Min, Zhigang Gao:
Transformable Vertexes Information based Algorithm for Online Task Placement in Reconfigurable System. ERSA 2009: 279-282 - Yoshiki Saito, Toru Sano, Masaru Kato, Vasutan Tunbunheng, Yoshihiro Yasuda, Hideharu Amano:
A Real Chip Evaluation of MuCCRA-3: A Low Power Dycamically Reconfigurable Processor Array. ERSA 2009: 283-286 - Santos López-Estrada, René Cumplido:
FPGA-architecture for Knowledge-Based Target Detection in Radar Signal Processing. ERSA 2009: 287-290 - Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama:
Acceleration of Optical-Flow Extraction Using Dynamically Reconfigurable ALU Arrays. ERSA 2009: 291-294
Posters
- Weisheng Zhao, Christian Gamrat, Yves Lhuillier:
Nanocomputing Block based Multi-Context FPGA. ERSA 2009: 297-298 - Craig Moore, Harald Devos, Dirk Stroobandt:
Optimizing the FPGA Memory Design for a Sobel Edge Detector. ERSA 2009: 299-300 - Sébastien Pillement, Daniel Chillet, Yaset Oliva, Jean-Christophe Prévotet:
High-Level Exploration for Dynamic Reconfiguration Management. ERSA 2009: 301-302 - Qian Ding, William Robinson:
An FPGA Implementation of an Elliptic Curve Cryptosystem Coprocessor over Prime Fields. ERSA 2009: 303-304 - Shinya Kubota, Minoru Watanabe:
A Multi-Context Programmable Optically Reconfigurable Gate Array. ERSA 2009: 305-306 - Takayuki Mabuchi, Kenji Miyashiro, Minoru Watanabe, Akifumi Ogiwara:
Optically Reconfigurable Gate Array with a One-Time Writable Holographic Memory. ERSA 2009: 307-308
Late Papers
- Scott Sirowy, Alessandro Forin:
Lost in Space! Quantifying the Elements of FPGA Speedup. ERSA 2009: 311-314 - Guillermo Botella Juan, Uwe Meyer-Bäse, Antonio García Ríos, Luís Parrilla Roure:
Improved gradient-based motion estimation on reconfigurable platforms. ERSA 2009: 315-318 - Mariusz Grad, Christian Plessl:
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX. ERSA 2009: 319-322 - Mahmood Fazlali, Ali Zakerolhosseini, Mojtaba Sabeghi, Koen Bertels, Georgi Gaydadjiev:
Data path Configuration Time Reduction for Run-time Reconfigurable Systems. ERSA 2009: 323-327 - Jorge Ortiz:
Area Evaluation for Parallel Execution in Reconfigurable Processor Architectures. ERSA 2009: 328-331 - Hironobu Morita, Minoru Watanabe:
Alignment compensation method for an optically reconfigurable gate array. ERSA 2009: 332-333
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