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ORCIDCDES 2008: Las Vegas, Nevada, USA
- Hamid R. Arabnia:
Proceedings of the 2008 International Conference on Computer Design, CDES 2008, Las Vegas, Nevada, USA, July 14-17, 2008. CSREA Press 2008, ISBN 1-60132-056-6
Algorithms, Circuit/Hardware Design, and Tools
- Xiang Xiao, Tuo Shi, Pranav S. Vaidya, Jaehwan John Lee:
R-tree: A Hardware Implementation. CDES 2008: 3-9 - Jacob Pennock, M. Nasseh Tabrizi:
A Survey of Input Sensing and Processing Techniques for Multi-Touch Systems. CDES 2008: 10-16 - Ranando King, Hai Jiang:
CSPA: An Adder Faster Than Carry-Lookahead. CDES 2008: 17-22 - Pijush Bhattacharjee:
Efficient Synthesis of Symmetric Function. CDES 2008: 23-29 - Yong-Hyuk Kim:
Improved Implementation Choices for Iterative Improvement Partitioning Algorithms on Circuits. CDES 2008: 30-34 - Dimitrios Voudouris, Marinos Sampson, George K. Papakonstantinou:
Finding Minimal ESCT Expressions for Boolean Functions with Weight of up to 7. CDES 2008: 35-41 - Yong-Sung Jeon, Sang-Woo Lee, Taek Yong Nam:
Design of Low-area Rijndael Hardware Core. CDES 2008: 42-45 - Dongmahn Seo, Heonguil Lee, Inbum Jung:
Transcoding Load Distribution Policy for Wireless Mobile Clients. CDES 2008: 46-52 - Gabriela Mogos:
Security of QImage File. CDES 2008: 53-56 - Rohit Sharma, Vivek Kumar Sehgal, Nitin, Saumya Rawat, Vinodini Kapoor, Sonia Chadha:
Time-Domain Analysis of VLSI Interconnects Considering Oscillatory Inputs. CDES 2008: 57-60
Power and Energy
- Wann-Yun Shieh, Shu-Yi Hsu:
Low Power Register File Design by Power Aware Register Assignment. CDES 2008: 63-69 - Mahdieh Nadi Senjani, Mahdiar Hosein Ghadiry:
The Effect of Number of Virtual Channels on NoC EDP. CDES 2008: 70-77 - Mahmoud Abdel-Fattah, Khaled El-Ayat:
Limits of Dynamic Voltage and Frequency Scaling Algorithms. CDES 2008: 78-84 - Pradeep S. Nair, Savithra Eratne, Eugene John:
Effects of Register File Organization on Leakage Power Consumption. CDES 2008: 85-88 - Vasily G. Moshnyaga:
How to Really Save Computer Energy? CDES 2008: 89-95
High-Performance Systems and Design Issues + Applications + Tools/OS
- Gerd Pfeiffer, Manfred Schimmler:
A Specification Methodology for the Optimal Layout of a 2-Stage Interconnect Bus for Massively Parallel Architectures. CDES 2008: 99-104 - Marinos Sampson, Dimitrios Voudouris, George K. Papakonstantinou:
A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions for Multi-Output Incompletely Specified Boolean Functions. CDES 2008: 105-111 - Alberto Ros, Manuel E. Acacio, José M. García:
Scalable Directory Organization for Tiled CMP Architectures. CDES 2008: 112-118 - Tarang Popat, Kaushal Buch:
A Novel Architecture for Fast Polynomial Division for Binary Coefficients. CDES 2008: 119-123 - Jeong-Gun Lee, Eun-Gu Jung:
Embedding High-Performance Synchronous Routers to Asynchronous Network on Chip. CDES 2008: 124-128 - Thomas Way, Rushikesh Katikar, Ch. Purushotham:
Nanocompilation for the Cell Matrix Architecture. CDES 2008: 129-135
Simulation, Modeling, and Testing
- Costa Gerousis, David Ball:
Single-Electron Tunneling Circuits for Image Processing Applications. CDES 2008: 139-144 - Lubomir Ivanov:
Modeling Non-Iterated System Behavior with Chu Spaces. CDES 2008: 145-150
Memory, Storage, Files, and Device Drivers
- Shinobu Miwa, Hironori Ichibayashi, Hidetsugu Irie, Masahiro Goshima, Hironori Nakajo, Shinji Tomita:
Low-Complexity Bypass Network Using Small RAM. CDES 2008: 153-159 - William Grim, Stephen Blythe:
A User-Space Device Driver Framework. CDES 2008: 160-166 - Jong-Min Jeong, Seung-Ho Park, Jung-Wook Park, Shin-Dug Kim, Charles C. Weems:
A Multi-Block Interleaving Structure for NAND Flash Memory Storage. CDES 2008: 167-173 - Martin Uhl:
Capturing Dynamic Memory Structures. CDES 2008: 174-180 - Oscar Camacho Nieto, Luis A. Villa Vargas, Osvaldo Espinosa-Sosa:
High Performance Cache. CDES 2008: 181-187
Late Papers
- Muthana Hamd:
Image Reconstruction Using Reconfigurable Hardware. CDES 2008: 191-194 - Sager Gosavi, Waleed K. Al-Assadi, Sasikiran Burugapalli:
Analysis & Modeling of Substrate Noise in Domino CMOS Circuits. CDES 2008: 195-200 - Srinivasa Vemuru, Ahmed Elkammar, Norman Scheinberg:
Subbus Control Line Impact on Effectiveness of Bus Encoding Schemes. CDES 2008: 201-206 - M. Hamd, Abdesselam Bouzerdoum:
A VHDL Design for PCA. CDES 2008: 207-210 - Mandar V. Joshi, Waleed K. Al-Assadi:
Nanowire Crossbar PLA with Adaptive Variable Redundancy. CDES 2008: 211-217 - François Giamarchi, Laurent Capocchi, Dominique Federici, Paul Bisgambiglia:
High-Level Automatic Test Generation for VHDL Descriptions. CDES 2008: 218-223 - Thanasin Bunnam, Arthit Thongtak:
An Approach for the Delay Simulation of D-Inverter in C-Ternary Logic Circuits. CDES 2008: 224-228
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