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"Modeling and Mitigating the Interconnect Resistance Issue in Analog RRAM ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Yubiao Luo et al. (2022)

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DOI: 10.1109/TCSI.2022.3199453

access: closed

type: Journal Article

metadata version: 2024-06-05

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Yubiao Luo, Shiqing Wang, Pushen Zuo, Zhong Sun, Ru Huang:
Modeling and Mitigating the Interconnect Resistance Issue in Analog RRAM Matrix Computing Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4367-4380 (2022)

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