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"Design Procedure for Settling Time Minimization in Three-Stage ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo (2008)

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DOI: 10.1109/TCSII.2007.906086

access: closed

type: Journal Article

metadata version: 2020-05-27

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Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo:
Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers. IEEE Trans. Circuits Syst. II Express Briefs 55-II(1): 1-5 (2008)

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