"Timed compiled-code functional simulation of embedded software for ..."

Jong-Yeol Lee, In-Cheol Park (2003)

> Home

Details and statistics

DOI: 10.1109/TCAD.2002.805721

access: closed

type: Journal Article

metadata version: 2024-02-05

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcad/LeeP03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/LeeP03
Jong-Yeol Lee, In-Cheol Park:
Timed compiled-code functional simulation of embedded software for performance analysis of SOC design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(1): 1-14 (2003)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.