


default search action
"Design of a low-power, high performance, 8×8 bit multiplier using a ..."
Chinnaiyan Senthilpari, Ajay Kumar Singh, Krishna M. Diwakar (2008)
- Chinnaiyan Senthilpari, Ajay Kumar Singh, Krishna M. Diwakar:

Design of a low-power, high performance, 8×8 bit multiplier using a Shannon-based adder cell. Microelectron. J. 39(5): 812-821 (2008)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID












