"A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor."

Hugh McIntyre et al. (2005)

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DOI: 10.1109/JSSC.2004.838017

access: closed

type: Journal Article

metadata version: 2022-03-02

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Hugh McIntyre, Dennis Wendell, K. James Lin, P. Kaushik, Suresh Seshadri, Alfred Wang, V. Sundararaman, Ping Wang, Song Kim, Wen-Jay Hsu, Hee-Choul Park, Gideon Levinsky, Jiejun Lu, M. Chirania, Raymond A. Heald, Paul Lazar, Sanjaya Dharmasena:
A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor. IEEE J. Solid State Circuits 40(1): 52-59 (2005)

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