"Architectural design of an RISC processor for programmable logic controllers."

Kyeonghoon Koo et al. (1998)

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DOI: 10.1016/S1383-7621(97)00011-8

access: closed

type: Journal Article

metadata version: 2022-05-05

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  - https://dblp.org/rec/journals/jsa/KooRKPC98
Kyeonghoon Koo, Gab Seon Rho, Wook Hyun Kwon, Jaehyun Park, Naehyuck Chang:
Architectural design of an RISC processor for programmable logic controllers. J. Syst. Archit. 44(5): 311-325 (1998)

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