"Modeling and control of VLSI circuit yield."

Renzo Traversini, Aurelio De Lisio, Giuseppe Barbuscia (1990)

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DOI: 10.1002/ETT.4460010315

access: closed

type: Journal Article

metadata version: 2020-05-18

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Renzo Traversini, Aurelio De Lisio, Giuseppe Barbuscia:
Modeling and control of VLSI circuit yield. Eur. Trans. Telecommun. 1(3): 327-336 (1990)

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