"Design of High-Speed Logic Circuits with Four-Step RRAM-Based Logic Gates."

Xiaole Cui et al. (2020)

> Home

Details and statistics

DOI: 10.1007/S00034-019-01300-0

access: closed

type: Journal Article

metadata version: 2025-01-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/cssp/CuiMLLZC20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/cssp/CuiMLLZC20
Xiaole Cui, Xiao Ma, Qiujun Lin, Xiang Li, Hang Zhou, Xiaoxin Cui:
Design of High-Speed Logic Circuits with Four-Step RRAM-Based Logic Gates. Circuits Syst. Signal Process. 39(6): 2822-2840 (2020)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.