"YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Using FPGAs."

Khyamling Parane, Basavaraj Talawar, Prabhu B. M. Prasad (2018)

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DOI: 10.1109/VLSID.2018.39

access: closed

type: Conference or Workshop Paper

metadata version: 2024-02-05

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Khyamling Parane, Basavaraj Talawar, Prabhu B. M. Prasad:
YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Using FPGAs. VLSID 2018: 67-72

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