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"A 0.63ps, 12b, synchronous cyclic TDC using a time adder for on-chip ..."
Sung-Jin Kim, Taeik Kim, Hojin Park (2014)
- Sung-Jin Kim, Taeik Kim, Hojin Park:

A 0.63ps, 12b, synchronous cyclic TDC using a time adder for on-chip jitter measurement of a SoC in 28nm CMOS technology. VLSIC 2014: 1-2

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