"5nm Low Power SRAM Featuring Dual-Rail Architecture with Voltage-Tracking ..."

Sangyeop Baeck et al. (2021)

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DOI: 10.23919/VLSICIRCUITS52068.2021.9492368

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type: Conference or Workshop Paper

metadata version: 2024-02-05

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Sangyeop Baeck, Inhak Lee, Hoyoung Tang, Dongwook Seo, Jaeseung Choi, Taejoong Song, Jongwook Kye:
5nm Low Power SRAM Featuring Dual-Rail Architecture with Voltage-Tracking Assist Circuit for 5G mobile application. VLSI Circuits 2021: 1-2

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