"Analysis of an Inverter Logic Cell based on 3D Vertical NanoWire ..."

Lucas Réveil et al. (2022)

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DOI: 10.1109/VLSI-SOC54400.2022.9939576

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

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Lucas Réveil, Chhandak Mukherjee, Cristell Maneux, Marina Deng, François Marc, Abhishek Kumar, Aurélie Lecestre, Guilhem Larrieu, Arnaud Poittevin, Ian O'Connor, Oskar Baumgartner, David Pirker:
Analysis of an Inverter Logic Cell based on 3D Vertical NanoWire Junction-Less Transistors. VLSI-SoC 2022: 1-2

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