"A 15-bit 20 MS/s SHA-Less Pipelined ADC Achieving 73.7 dB SNDR with ..."

Jia-Ching Wang, Tsung-Chih Hung, Tai-Haur Kuo (2019)

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DOI: 10.1109/VLSI-DAT.2019.8741986

access: closed

type: Conference or Workshop Paper

metadata version: 2019-06-27

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Jia-Ching Wang, Tsung-Chih Hung, Tai-Haur Kuo:
A 15-bit 20 MS/s SHA-Less Pipelined ADC Achieving 73.7 dB SNDR with Averaging Correlated Level Shifting Technique. VLSI-DAT 2019: 1-3

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