"Area compact 5T portless SRAM cell for high density cache in 65nm CMOS."

Jitendra Yadav et al. (2015)

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DOI: 10.1109/ISVDAT.2015.7208095

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  persistent URL:
  - https://dblp.org/rec/conf/vdat/YadavDJG15
Jitendra Yadav, Pallavi Das, Abhinav Jain, Anuj Grover:
Area compact 5T portless SRAM cell for high density cache in 65nm CMOS. VDAT 2015: 1-4

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