"A Hardware Generator for Posit Arithmetic and its FPGA Prototyping."

Diksha Shekhawat, Apoorva Jangir, Jai Gopal Pandey (2021)

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DOI: 10.1109/VDAT53777.2021.9601025

access: closed

type: Conference or Workshop Paper

metadata version: 2024-08-04

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Diksha Shekhawat, Apoorva Jangir, Jai Gopal Pandey:
A Hardware Generator for Posit Arithmetic and its FPGA Prototyping. VDAT 2021: 1-6

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