"RISC-V Half Precision Floating Point Instruction Set Extensions and ..."

Aneesh Raveendran et al. (2019)

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DOI: 10.1007/978-981-32-9767-8_40

access: closed

type: Conference or Workshop Paper

metadata version: 2021-11-19

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Aneesh Raveendran, Sandra Jean, J. Mervin, Vivian Desalphine, A. David Selvakumar:
RISC-V Half Precision Floating Point Instruction Set Extensions and Co-processor. VDAT 2019: 482-495

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