"Area optimized CMOS layouts of a 50 Gb/s low power 4: 1 multiplexer."

Vibhor Pareek, Gaurvi Goyal (2015)

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DOI: 10.1109/ISVDAT.2015.7208054

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

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Vibhor Pareek, Gaurvi Goyal:
Area optimized CMOS layouts of a 50 Gb/s low power 4: 1 multiplexer. VDAT 2015: 1-6

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