default search action

combined dblp search
author search
venue search
publication search

ask others

"A 6T SRAM cell based pipelined 2R/1W memory design using 28nm UTBB-FDSOI."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Ramandeep Kaur, Alexander Fell, Harsh Rawat (2015)

> Home

Details and statistics

DOI: 10.1109/SOCC.2015.7406973

access: closed

type: Conference or Workshop Paper

metadata version: 2023-06-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/socc/KaurFR15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/socc/KaurFR15
Ramandeep Kaur, Alexander Fell, Harsh Rawat:
A 6T SRAM cell based pipelined 2R/1W memory design using 28nm UTBB-FDSOI. SoCC 2015: 310-315

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.

last updated on 2023-06-26 20:42 CEST by the dblp team

all metadata released as open data under CC0 1.0 license

see also: Terms of Use | Privacy Policy | Imprint

dblp was originally created in 1993 at:

since 2018, dblp has been operated, funded, and maintained by:

Schloss Dagstuhl - Leibniz Center for Informatics is a member of the Leibniz Association and is funded by the federal government of Germany and the states of Germany, especially Saarland and Rhineland‑Palatinate.