"Design of High Throughput FPGA-Based Testbed for Accelerating Error ..."

Burak Unal et al. (2019)

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DOI: 10.1109/RECONFIG48160.2019.8994785

access: closed

type: Conference or Workshop Paper

metadata version: 2024-02-05

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Burak Unal, Md Sahil Hassan, Joshua Mack, Nirmal Kumbhare, Ali Akoglu:
Design of High Throughput FPGA-Based Testbed for Accelerating Error Characterization of LDPC Codes. ReConFig 2019: 1-8

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