"Loop optimization in presence of STT-MRAM caches: A study of ..."

Pierre-Yves Peneau et al. (2016)

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DOI: 10.1109/PATMOS.2016.7833682

access: closed

type: Conference or Workshop Paper

metadata version: 2021-04-09

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  - conf/patmos/PeneauBGRBSTS16
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Pierre-Yves Peneau, Rabab Bouziane, Abdoulaye Gamatié, Erven Rohou, Florent Bruguier, Gilles Sassatelli, Lionel Torres, Sophiane Senni:
Loop optimization in presence of STT-MRAM caches: A study of performance-energy tradeoffs. PATMOS 2016: 162-169

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