"On Area-Efficient Implementation of Data Delays in 7 Series Xilinx FPGAs."

Marek Parfieniuk, Sang Yoon Park (2016)

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DOI: 10.1109/ISVLSI.2016.14

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Marek Parfieniuk, Sang Yoon Park:
On Area-Efficient Implementation of Data Delays in 7 Series Xilinx FPGAs. ISVLSI 2016: 391-396

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