"Clock Generation and Distribution of a Dual-Core Xeon Processor with 16MB ..."

Simon Tam et al. (2006)

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DOI: 10.1109/ISSCC.2006.1696202

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-15

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Simon Tam, Justin Leung, Rahul Dilip Limaye, Sam Choy, Sujal Vora, Mitsuhiro Adachi:
Clock Generation and Distribution of a Dual-Core Xeon Processor with 16MB L3 Cache. ISSCC 2006: 1512-1521

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