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"12.2 A1.8V 30-to-70MHz 87% peak-efficiency 0.32mm2 4-phase ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Seong Joong Kim et al. (2015)

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DOI: 10.1109/ISSCC.2015.7063003

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Seong Joong Kim, Romesh Kumar Nandwana, Qadeer Ahmad Khan, Robert C. N. Pilawa-Podgurski, Pavan Kumar Hanumolu:
12.2 A1.8V 30-to-70MHz 87% peak-efficiency 0.32mm² 4-phase time-based buck converter consuming 3μA/MHz quiescent current in 65nm CMOS. ISSCC 2015: 1-3

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