"17.6 A 21.7-to-26.5GHz Charge-Sharing Locking Quadrature PLL with Implicit ..."

Yizhe Hu et al. (2020)

> Home

Details and statistics

DOI: 10.1109/ISSCC19947.2020.9063024

access: closed

type: Conference or Workshop Paper

metadata version: 2026-02-01

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/HuCSDGGZS20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/HuCSDGGZS20
Yizhe Hu, Xi Chen, Teerachot Siriburanon, Jianglin Du, Zhong Gao, Vivek Govindaraj, Anding Zhu, Robert Bogdan Staszewski:
17.6 A 21.7-to-26.5GHz Charge-Sharing Locking Quadrature PLL with Implicit Digital Frequency-Tracking Loop Achieving 75fs Jitter and -250dB FoM. ISSCC 2020: 276-278

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.