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"10.6 A 6.75-to-8.25GHz, 250fsrms-integrated-jitter 3.25mW rapid on/off ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Ahmed Elkholy et al. (2016)

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DOI: 10.1109/ISSCC.2016.7417972

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Ahmed Elkholy, Ahmed Elmallah, Mohamed Elzeftawi, Ken Chang, Pavan Kumar Hanumolu:
10.6 A 6.75-to-8.25GHz, 250fsrms-integrated-jitter 3.25mW rapid on/off PVT-insensitive fractional-N injection-locked clock multiplier in 65nm CMOS. ISSCC 2016: 192-193

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