"Gate movement for timing improvement on row based Dual-VDD designs."

Hua Xiang et al. (2016)

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DOI: 10.1109/ISQED.2016.7479238

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-02

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  - https://dblp.org/rec/conf/isqed/XiangRQZLYSL16
Hua Xiang, Lakshmi N. Reddy, Haifeng Qian, Ching Zhou, Yu-Shiang Lin, Fanchieh Yee, Andrew Sullivan, Pong-Fei Lu:
Gate movement for timing improvement on row based Dual-VDD designs. ISQED 2016: 423-429

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