"Process variation tolerant 9T SRAM bitcell design."

G. K. Reddy et al. (2012)

> Home

Details and statistics

DOI: 10.1109/ISQED.2012.6187539

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-27

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isqed/ReddyJSM12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isqed/ReddyJSM12
G. K. Reddy, Kapil Jainwal, Jawar Singh, Saraju P. Mohanty:
Process variation tolerant 9T SRAM bitcell design. ISQED 2012: 493-497

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.