"A PVT aware accurate statistical logic library for high- metal-gate nano-CMOS."

Dhruva Ghai et al. (2009)

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DOI: 10.1109/ISQED.2009.4810268

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos, Priyadarsan Patra:
A PVT aware accurate statistical logic library for high- metal-gate nano-CMOS. ISQED 2009: 47-54

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