"A Minimum Value Determination Circuit Using a Neuron CMOS WTA with FGC ..."

Naruaki Hokari et al. (2024)

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DOI: 10.1109/ISPACS62486.2024.10869272

access: closed

type: Conference or Workshop Paper

metadata version: 2025-03-10

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Naruaki Hokari, Hisaya Sawada, Hirotaka Furukawa, Tatsuya Hasegawa, Daishi Nishiguchi, Masaaki Fukuhara:
A Minimum Value Determination Circuit Using a Neuron CMOS WTA with FGC Circuit. ISPACS 2024: 1-5

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