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"How to Cope with Slow Transistors in the Top-tier of Monolithic 3D ICs: ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Sandeep Kumar Samal et al. (2016)

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DOI: 10.1145/2934583.2934643

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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Sandeep Kumar Samal, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Sung Kyu Lim:
How to Cope with Slow Transistors in the Top-tier of Monolithic 3D ICs: Design Studies and CAD Solutions. ISLPED 2016: 320-325

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last updated on 2022-10-02 16:09 CEST by the dblp team

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