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ORCID"Reduction of minimum operating voltage (VDDmin) of CMOS logic ..."
- Kentaro Honda, Katsuyuki Ikeuchi, Masahiro Nomura, Makoto Takamiya, Takayasu Sakurai:
Reduction of minimum operating voltage (VDDmin) of CMOS logic circuits with post-fabrication automatically selective charge injection. ISLPED 2011: 175-180
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