"Generating and checking control logic in the HDL-based design of ..."

Robert Wille et al. (2016)

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DOI: 10.1109/ISED.2016.7977045

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-25

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Robert Wille, Oliver Keszöcze, Lars Othmer, Michael Kirkedal Thomsen, Rolf Drechsler:
Generating and checking control logic in the HDL-based design of reversible circuits. ISED 2016: 7-12

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