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"Low Area & Memory Efficient VLSI Architecture of 1D/2D DWT for Real ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Anirban Chakraborty, Ayan Banerjee (2018)

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DOI: 10.1109/ISED.2018.8704060

access: closed

type: Conference or Workshop Paper

metadata version: 2023-08-21

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Anirban Chakraborty, Ayan Banerjee:
Low Area & Memory Efficient VLSI Architecture of 1D/2D DWT for Real Time Image Decomposition. ISED 2018: 116-123

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