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"Minimum Power Point Design of Inverter Based Continuous Time Linear ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Andrew Ensinger et al. (2024)

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DOI: 10.1109/ISCAS58744.2024.10558083

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

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  dblp key:
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Andrew Ensinger, Ramin Javadi, Xiaohui Lin, Bella Bose, Tejasvi Anand:
Minimum Power Point Design of Inverter Based Continuous Time Linear Equalizer (CTLE). ISCAS 2024: 1-5

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last updated on 2024-10-06 21:09 CEST by the dblp team

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