"Modeling a switch architecture with virtual output queues and virtual ..."

Pedro Yébenes et al. (2016)

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DOI: 10.1109/HPCSIM.2016.7568360

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-25

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Pedro Yébenes, German Maglione Mathey, Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco J. Quiles:
Modeling a switch architecture with virtual output queues and virtual channels in HPC-systems simulators. HPCS 2016: 380-386

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