"Improved clock-phase generator based on self-biased CMOS logic for ..."

Michael Figueiredo et al. (2009)

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DOI: 10.1109/ICECS.2009.5410771

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-04

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Michael Figueiredo, Tomasz Michalak, João Goes, Luís Gomes, Pawel Sniatala:
Improved clock-phase generator based on self-biased CMOS logic for time-interleaved SC circuits. ICECS 2009: 763-766

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