"LUT-Based Power Macromodeling Technique for DSP Architectures."

Yaseer Arafat Durrani, Teresa Riesgo (2007)

> Home

Details and statistics

DOI: 10.1109/ICECS.2007.4511265

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/icecsys/DurraniR07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/icecsys/DurraniR07
Yaseer Arafat Durrani, Teresa Riesgo:
LUT-Based Power Macromodeling Technique for DSP Architectures. ICECS 2007: 1416-1419

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.