"A 40-nm CMOS, 1.1-V, 101-dB DR, 1.7-mW continuous-time ΣΔ ADC ..."

Achille Donida et al. (2013)

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DOI: 10.1109/ICECS.2013.6815448

access: closed

type: Conference or Workshop Paper

metadata version: 2019-06-02

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Achille Donida, Piero Malcovati, Remy Cellier, Angelo Nagari, Andrea Baschirotto:
A 40-nm CMOS, 1.1-V, 101-dB DR, 1.7-mW continuous-time ΣΔ ADC for a digital closed-loop class-D amplifier. ICECS 2013: 437-440

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