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ORCID"A 64 kb differential single-port 12T SRAM design with a bit-interleaving ..."
- Samira Ataei, James E. Stine
, Matthew R. Guthaus:
A 64 kb differential single-port 12T SRAM design with a bit-interleaving scheme for low-voltage operation in 32 nm SOI CMOS. ICCD 2016: 499-506
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